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Chapter 3 VLSI Design

Chapter 3 VLSI Design. The Devices. March 28, 2003. Goal of this chapter. Present intuitive understanding of device operation Introduction of basic device equations Introduction of models for manual analysis Introduction of models for SPICE simulation

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Chapter 3 VLSI Design

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  1. Chapter 3VLSI Design The Devices March 28, 2003

  2. Goal of this chapter • Present intuitive understanding of device operation • Introduction of basic device equations • Introduction of models for manual analysis • Introduction of models for SPICE simulation • Analysis of secondary and deep-sub-micron effects • Future trends

  3. B A Al SiO 2 p n Cross-section of pn -junction in an IC process A Al A p n B B One-dimensional representation diode symbol The Diode Mostly occurring as parasitic element in Digital ICs

  4. Depletion Region

  5. Diode Current

  6. Models for Manual Analysis

  7. Junction Capacitance

  8. Secondary Effects 0.1 ) A ( 0 D I –0.1 –25.0 –15.0 –5.0 0 5.0 V (V) D Avalanche Breakdown

  9. Diode Model

  10. SPICE MODELS • SPICE: Simulation Program with Integrated Circuit Emphasis, by UCB in early 1970’s. • Level 1: Long Channel Equations - Very Simple • Level 2: Physical Model - Includes Velocity Saturation and Threshold Variations • Level 3: Semi-empirical - Based on curve fitting to measured devices • Level 4 (Berkeley Short-Channel IGFET Model, BSIM3v3): Empirical - Simple and Very Popular,. • Full-fledged BSIM3v3 model (denoted as LEVEL 49) covers over 200 parameters.

  11. SPICE Parameters

  12. |V | GS A Switch! An MOS Transistor What is a Transistor?

  13. The MOS Transistor Polysilicon Aluminum/Cu

  14. MOS Transistors -Types and Symbols D D G G S S Depletion NMOS Enhancement NMOS D D G G B S S NMOS with PMOS Enhancement Bulk Contact

  15. Threshold Voltage: Concept

  16. The Threshold Voltage

  17. The Body Effect

  18. -4 x 10 6 VGS= 2.5 V 5 Resistive Saturation 4 VGS= 2.0 V Quadratic Relationship (A) 3 VDS = VGS - VT D I 2 VGS= 1.5 V 1 VGS= 1.0 V 0 0 0.5 1 1.5 2 2.5 V (V) DS Current-Voltage Relations

  19. Transistor in Linear

  20. Pinch-off Transistor in Saturation

  21. Current-Voltage RelationsLong-Channel Device

  22. A model for manual analysis

  23. -4 x 10 2.5 VGS= 2.5 V Early Saturation 2 VGS= 2.0 V 1.5 Linear Relationship (A) D I VGS= 1.5 V 1 VGS= 1.0 V 0.5 0 0 0.5 1 1.5 2 2.5 V (V) DS Current-Voltage RelationsThe Deep-Submicron Era

  24. 5 u = 10 sat ) s / m ( n u x = 1.5 x (V/µm) c Velocity Saturation Constant velocity Constant mobility (slope = µ)

  25. Perspective I D Long-channel device V = V GS DD Short-channel device V V - V V DSAT GS T DS

  26. -4 x 10 -4 x 10 6 2.5 5 2 4 1.5 (A) 3 (A) D D I I 1 2 0.5 1 0 0 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 V (V) V (V) GS GS ID versus VGS linear quadratic quadratic Long Channel Short Channel

  27. -4 -4 x 10 x 10 2.5 6 VGS= 2.5 V VGS= 2.5 V 5 2 Resistive Saturation VGS= 2.0 V 4 VGS= 2.0 V 1.5 (A) (A) 3 D D VDS = VGS - VT I I VGS= 1.5 V 1 2 VGS= 1.5 V VGS= 1.0 V 0.5 1 VGS= 1.0 V 0 0 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 V (V) V (V) DS DS ID versus VDS Long Channel Short Channel

  28. G S D B A unified modelfor manual analysis

  29. -4 x 10 2.5 VDS=VDSAT 2 VelocitySaturated 1.5 Linear 1 VDSAT=VGT 0.5 VDS=VGT Saturated 0 0 0.5 1 1.5 2 2.5 Simple Model versus SPICE (A) D I V (V) DS

  30. -4 x 10 0 -0.2 -0.4 (A) D I -0.6 -0.8 -1 -2.5 -2 -1.5 -1 -0.5 0 V (V) DS A PMOS Transistor VGS = -1.0V VGS = -1.5V VGS = -2.0V Assume all variables negative! VGS = -2.5V

  31. Transistor Model for Manual Analysis

  32. The Transistor as a Switch

  33. The Transistor as a Switch

  34. The Transistor as a Switch

  35. MOS CapacitancesDynamic Behavior

  36. Dynamic Behavior of MOS Transistor

  37. Polysilicongate Source Drain W x x + + n n d d Gate-bulk L d overlap Top view Gate oxide t ox + + n n L Cross section The Gate Capacitance

  38. Gate Capacitance Cutoff Triode Saturation Cut-off Resistive Saturation Most important regions in digital design: saturation and cut-off

  39. Gate Capacitance Capacitance as a function of the degree of saturation Capacitance as a function of VGS (with VDS = 0)

  40. Measuring the Gate Cap

  41. Channel-stop implant N 1 A Side wall Source W N D Bottom x Side wall j Channel L Substrate N S A Diffusion Capacitance

  42. Capacitances in 0.25 mm CMOS process

  43. The Sub-Micron MOS Transistor • Threshold Variations • Subthreshold Conduction • Parasitic Resistances

  44. V V T T Threshold Variations Low V threshold Long-channel threshold DS VDS L Threshold as a function of Drain-induced barrier lowering the length (for low V ) (for low L ) DS

  45. -2 10 Linear -4 10 -6 Quadratic 10 (A) D I -8 10 Exponential -10 10 VT -12 10 0 0.5 1 1.5 2 2.5 V (V) GS Sub-Threshold Conduction The Slope Factor S is DVGS for ID2/ID1 =10 Typical values for S: 60 .. 100 mV/decade

  46. Sub-Threshold ID vs VGS VDS from 0 to 1.0V

  47. Sub-Threshold ID vs VDS VGS from 0 to 0.3V

  48. Summary of MOSFET Operating Regions • Strong Inversion VGS >VT • Linear (Resistive) VDS <VDSAT • Saturated (Constant Current) VDS VDSAT • Weak Inversion (Sub-Threshold) VGS VT • Exponential in VGS with linear VDS dependence

  49. Parasitic Resistances

  50. Latch-up (Effect of Parasitic Resistance)

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