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Coupling Aware Timing Optimization and Antenna Avoidance in Layer Assignment. Di Wu, Jiang Hu and Rabi Mahapatra Texas A&M University. Outline. Background and previous works Problem formulation Improved probabilistic coupling capacitance model Antenna avoidance through tree partitioning
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Coupling Aware Timing Optimization and Antenna Avoidance in Layer Assignment Di Wu, Jiang Hu and Rabi Mahapatra Texas A&M University
Outline • Background and previous works • Problem formulation • Improved probabilistic coupling capacitance model • Antenna avoidance through tree partitioning • Layer assignment heuristic • Experimental results
Coupling capacitance • Coupling capacitance (crosstalk) induces two different problems: • Functional noise: • Delay noise: Coupling capacitance between segment i and j. • fij : switching activities between i and j. • Lenij : coupling length. • Distij : coupling distance. • and : technology dependent constants.
Coupling induced delay • Delay from CC in Elmore delay model • Same amount of coupling leads to different delay depending on coupling location. • Most of previous works on layer/track assignment consider crosstalk only, not its impact on timing. [ThakurISCAS95’] [KayISPD00’] i Extra delay from CC to the critical sink a b s critical sink j non-critical sink
Diffusion Sink 1 Sink 2 Antenna effect • Occurs during manufacturing • Conductor layers fabricated from lowest layer to highest layer. • Conductor layers, connected only to the gate oxide, called antenna. • Risk of gate damage is proportional to the antenna size. Antenna violation
Antenna avoidance methods • Diode insertion • Add protection diode to gate in case of antenna violation. [ChenISQED00’] [HuangTCAD04’] • Jumper insertion • Break long antenna by switching wire to the top layer and switch back immediately. [HoISPD04’] • Layer assignment • Reduce antenna length by layer assignment. [ShirotaCICC98’] [ChenISDFT00’]
Jumper insertion vs. layer assignment • Each jumper costs two vias and a short segment on the top layer. Antenna violation Gate Diffusion Jumper insertion Gate Diffusion Layer assignment Gate Diffusion
Layer assignment problem formulation • Given • Global routing solution. • Required Arrival Time (RAT) for each sink. • Via constraints on the boundaries of two adjacent GRCs. (Global Routing Cells) • Goal • Maximize the minimum slack among all sinks considering coupling. • Number of antenna violations is minimized. • Via constraints are satisfied.
Probabilistic coupling model • A routing region r with n uniformly spaced tracks and k wire segments. • Cr : probabilistic coupling capacitance for a target wire i in r. Cr?? Routing region r target wire i other wire
Improved probabilistic model • Linear model: a totally random model. • Improved model: suitable for a track/detailed router with coupling avoidance. • If k < n/2, enough empty tracks to separate signal nets. • If k > n/2, adjacent empty tracks are disallowed, otherwise waste of empty tracks. Cr=0
Derivation of the probabilistic model if otherwise • k,n,1: number of permutations target wire has one adjacent wire. • k,n,2: number of permutations target wire has two adjacent wires. • k,n: total number of permutations. • Each of k,n,1, k,n,2 and k,n limits to the cases that no two empty tracks are adjacent to each other.
Derivation of k,n • Empty tracks can only be inserted into limited “slots” to avoid their adjacency. • After empty tracks are inserted, perform permutation on the wires. a wire potential slot for empty tracks k,n = k,n: total # of permutations with no adjacent empty tracks.
target wire i empty track other wire bundle potential position for empty tracks Derivation of k,n,1 • Target wire is not on boundary k,n,1 – not_on_boundary = k,n,1: total # of permutations target wire has one neighboring wire.
target wire i empty track other wire bundle potential position for empty tracks Derivation of k,n,1 • Target wire is on boundary • k,n,1 = k,n,1 -not_on_boudary + k,n,1 -on_boudary k,n,1 –on_boundary = k,n,1: total # of permutations target wire has one neighboring wire.
Derivation of k,n,2 target wire i other wire bundle potential position for empty tracks k,n,2 = k,n,2: total # of permutations target wire has two neighboring wires.
Comparison of linear model and improved model • Comparison of the improved probabilistic model with a linear model [BecerSLIP02] when k =0 ~ 30 and n=30.
Antenna avoidance through layer assignment • Separators : segments that surround an antenna. • If separators are limited on the top metal layer (Ltop), antenna problem becomes a tree partitioning problem. Metal 1 Metal 2 Metal 3 Sink v Metal 4 Antenna for v “don’t care” region for v
Ts Tree partitioning for antenna avoidance (TPAA) • Find the minimum number of separators such that the size of each resulting sub-tree (containing sinks) is less than Amax (Maximum allowed antenna size). • Example: separators W(Ts): total length of tree Ts
Linear optimal tree partitioning algorithm • An bottom-up approach, adapted from [KunduSIAM77’], each node in the tree processed at most once. • At each node u, if W(Tu) > Amax, remove minimum number of separators in Tu (assign to Ltop), such that the resulting W(Tu) Amax. • A O(n) SPLIT technique to find minimum separators. 1 1 1 1 1 1 Amax=5 W(Tu): total length of tree Tu
Constrained tree partitioning • Each metal layer has a preferred routing direction (horizontal or vertical) not every segment can be assigned to Ltop. • Feasible branch: root edge of a branch can be assigned to Ltop. • Define BMF(u) : maximal feasible branches for Tu. • Apply tree partitioning on BMF(u) with Amax,reduced. • Amax,reduced=Amax- ∑ Weight( infeasible edge separating BMF(u)) u infeasible edge 2 a 1 d b c e Amax=30 Amax,reduced=27
Tree partitioning based optimal jumper insertion • Similar techniques can be applied to jumper insertions. • Time complexity is O(n) and can be applied to the work of [HoISPD04]. 1 1 1 1 1 1 Amax=5
Layer assignment heuristic • Consider both coupling induced delay and antenna effects. • Proceeds in a panel by panel order. • Within a panel, most congested region is processed first. Global cell processing order
Layer assignment heuristic Within each global cell - an MILP problem, we provide a simple heuristic: • Assign antenna-critical segments to Ltop. • Sort non-critical segments in non-increasing order of min timing slacks. • Partition the non-critical segments to layers min slack is maximized. Coupling estimated with the probabilistic model. • Enforce via constraints. • Update slacks for each segment (net) in this cell.
Layer assignment example • Layer assignment example on one global cell. antenna critical Timing slacks before LA 300ps 250ps 100ps 20ps 100ps Layer 3 Layer 2 Layer 1 Layer 0 240ps 230ps 50ps 20ps 100ps Timing slacks after LA
Benchmark circuits • ISPD98/IBM circuits [AlpertISPD98].
Benchmark circuit • Placement by Dragon [WangICCAD00]. • Global routing by a rip-up and re-route router. • Our method is compared with three other methods: • Method 1: consider only total coupling capacitance. • Method 2: coupling capacitance estimated by a trial track/layer assignment method. • Method 3: coupling capacitance is estimated using the linear model. • Results are validated by a timing-driven track router.
Experimental results – Antenna violations • LA: Layer Assignment without Antenna Avoidance. • LAAA: Layer Assignment with Antenna Avoidance.
Experimental results – via violations • JI : Jumper Insertion.
Experimental result - CPU CPU time is similar for all methods
Conclusion • An improved probabilistic crosstalk model is proposed to fit for a coupling-aware timing-driven track/detailed router. • Antenna avoidance through tree partitioning. • Experimental results showed : • significant via reductions compare to jumper insertions. • timing improvement using the improved probabilistic model. Thank you!
SPLIT example • A sub-tree Tu has 5 branches and Amax=24. W(Tu)=28. • median-find-and-half : Find median, then halve. • SPLIT({6,2,9,7,4},24) = SPLIT ({9,7},12)={9} Tu 2 2 2 3 3 2 2 2 2 2 5 1