Venn Diagram – the visual aid in verifying theorems and properties

1. Venn Diagram – the visual aid in verifying theorems and properties • Provides a graphical illustration of operations and relations in the algebra of sets. • The elements of a set are represented by the area enclosed by a contour. • Given a universe N of integers from 1 to 10; • Even numbers E = { 2, 4, 6, 8, 10 }; • Odd numbers form E’s complement, = { 1, 3, 5, 7, 9 }; N = { E, } E

2. Venn Diagram in Boolean algebra Represent the universe B = {0, 1} by a square. • {1} using shaded area Represent a Boolean variable x by a circle. • Area inside the circle -> x = 1; • Area outside the circle -> x = 0; (a) Constant 1 (b) Constant 0 x x (c) Variable (d) x

3. Venn Diagram – for two or more Boolean variables Represent x, y by drawing two overlapping circles • AND operation x ∙ y -> shade overlapping area of both circles. -> also referred to as the intersectionof x and y. • OR operation x + y -> shade total area within both circles -> also called the unionof x and y x y x y (e) (f) × x y x + y x y x y z (h) (g) × x y + z x y ×

4. App: Verifying the equivalence of two expressions x y x y x y z z z (a) (b) x (c) × ( ) y + z x y + z x y x y x y z z z (f) (e) (d) x z × × x y + x z × x y × Verification of distributive property x ∙ (y + z) = x ∙ y + x ∙ z

5. x y z z x x y y z z Another verification example x y x y x y z z z y z × × x y × z x y z × x y

6. 2.6 Synthesis using AND, OR, NOT gates • Can express the required behavior using a truth table Figure 2.15. A function to be synthesized.

7. Procedures for designing a logic circuit • Create a product term for each valuation whose output function f is 1. • Product term: all variables are ANDed. • Take a logic sum (OR) of these product terms to realize f. f = x1x2 + + x2

8. x 1 x 2 f = x1x2 + + x2 = (x1x2 + x2)+(+x2) = (x1+) x2 + (+x2) = 1 ∙ x2 + ∙ 1 = x2 + f (a) Canonical sum-of-products x 1 f x 2 (b) Minimal-cost realization Figure 2.16. Two implementations of a function in Figure 2.15.

9. Summary • To implement a function, • Use a product term (AND gate) for each row of the truth table for which the function is equal to 1. • If xi = 1 in the given row, xi is entered in the term; • If xi = 0, is entered in the term. • The sum of these product terms realizes the desired function • Different networks can realize a given function • Use algebraic manipulation to derive simplified logic expression, thus lower-cost networks.

10. Minterms and Sum-of-products (SOP) • Minterms: a product term in which each of the n variables for a function appear once • Variables may appear in either un-complemented or complemented form, • Use mito denote the minterm for the row number i. • Sum-of-products Form: a logic expression consisting of product (AND) terms that are summed (ORed) • Canonical SOP: each term is a minterm

11. Figure 2.17 Three-variable minterms and maxterms.

12. Canonical SOP expression f = x3+ x1 + x1+ x1 Manipulate f as following f = (x1+) x3+ x1(x2+ ) = 1 x3 + x11 = x3 + x1 Figure 2.18. A three-variable function. A more concise form to specify the given canonical SOP expression (logical sum) f =

13. Maxterms and Product-of-Sums (POS) • Maxterms: complements of minterms • By applying the principle of duality, if we could synthesize a function f by considering the rows for which f = 1, it should also be possible to synthesize f by considering the rows where f = 0 • Product-of-sums Form: a logic expression consisting of sum (OR) terms that are the factors of a logical product (AND) • Canonical POS: each term is maxterm

14. Figure 2.17 Three-variable minterms and maxterms.

15. An example • The complement of a function can be represented by a sum of minterms for which f = 0. • Complement this expression using DeMorgan’s theorem = M2

16. = m0 + m2 + m3 + m7 f = = = M0 M2M3 M7 = (x1+x2+x3) (x1++x3) (x1++)(++) f = (x1+x3) (+) Figure 2.18. A three-variable function. A more concise form to specify the given canonical POS expression (logical product) f =

17. Cost of a logic circuit is • the total number of gates plus • the total number of inputs to all gates in the circuit. x 2 f = x3 + x1 Cost = 13 f x 3 x 1 (a) A minimal sum-of-products realization Figure 2.19. Two realizations of a function in Figure 2.18.

18. x 2 f x 3 x 1 (a) A minimal sum-of-products realization Cost = 13 x 1 x 3 f x 2 (b) A minimal product-of-sums realization Figure 2.19. Two realizations of a function in Figure 2.18.

19. Example 2.3 Consider the function f(x1,x2,x3) = 1. Canonical SOP expression for the function f = m2+m3+m4+m6+m7 = 2. Simplify the expression f = + = +

20. Example 2.4 Consider the function in Example 2.3, Specify it as a product of maxterms for which f = 0 f(x1,x2,x3) = 1. Canonical POS expression for the function f = M0M1M5 = (x1+x2+x3)(x1+x2+)(+x2+) 2. Simplify the expression f = (x1+x2)(x2+) = x2+x1

21. Discussion (1) Given a logic function f(x1,x2,x3), 1. What is the index of the maxterm ? ) -> 0 1 0 (010)2= 2 (decimal number) Therefore, = m2 2. What is the logic expression of m5? (5)10= (1 0 1)2 => m5 = ( Complemented entry -> 0 uncomplement entry -> 1

22. Discussion (2) Given a logic function f(x1,x2,x3), 1. What is the index of the maxterm ) ? ) -> 1 0 1 (101)= 5 (decimal) Therefore, ) = M5 2. What is the logic expression of M5? (5)10= (1 0 1)2 => M5 = ( Complemented entry -> 1 uncomplement entry -> 0

23. Venn Diagram for Boolean algebra • Basic requirement for legal Venn diagram • Must be able to represent all minterms of a Boolean function Three variables Two variables x2 x1 m6 x2 x1 m4 m2 m7 m3 m1 m2 m5 m3 m1 m0 x3 m0

24. Venn Diagram for Boolean algebra • Basic requirement for legal Venn diagram • Must be able to represent all minterms of a Boolean function Three variables m5? m7? Two variables x2 x1 x3 x2 x1 m6 m4 m1 m3 m3 m1 m2 m2 m0 m0