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EE121 John Wakerly Lecture #4

Learn how to design and analyze combinational circuits using ABEL and HDL. Explore exhaustive, algebraic, and simulation-based analysis methods. Understand circuit transformations, prime implicants, and algebraic simplification. Discover the Quine-McCluskey algorithm and its applications. Dive into real-world logic design using higher-level languages like ABEL and VHDL.

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EE121 John Wakerly Lecture #4

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  1. EE121 John Wakerly Lecture #4 Combinational-Circuit Synthesis ABEL

  2. Combinational-Circuit Analysis • Combinational circuits -- outputs depend only on current inputs (not on history). • Kinds of combinational analysis: • exhaustive (truth table) • algebraic (expressions) • simulation / test bench (example in lab #2) • Write functional description in HDL • Define test conditions / test vecors, including corner cases • Compare circuit output with functional description (or known-good realization) • Repeat for “random” test vectors

  3. Combinational-Circuit Design • Sometimes you can write an equation or equations directly using “logic” (the kind in your brain). • Example (alarm circuit): • Corresponding circuit:

  4. Alarm-circuit transformation • Sum-of-products form • Useful for programmable logic devices (next lec.) • “Multiply out”:

  5. AND-OR NAND-NAND Sum-of-products form

  6. OR-AND NOR-NOR Product-of-sums form P-of-S preferred in CMOS, TTL (NAND-NAND)

  7. row N3 N2 N1 N0 F 0 0 0 0 0 0 1 0 0 0 1 1 2 0 0 1 0 1 3 0 0 1 1 1 4 0 1 0 0 0 5 0 1 0 1 1 6 0 1 1 0 0 7 0 1 1 1 1 8 1 0 0 0 0 9 1 0 0 1 0 10 1 0 1 0 0 11 0 0 1 1 1 12 1 1 0 0 0 13 1 1 0 1 1 14 1 1 1 0 0 15 1 1 1 1 0 Brute-force design • Truth table --> canonical sum (sum of minterms) • Example:prime-number detector • 4-bit input, N3N2N1N0 F = SN3N2N1N0(1,2,3,5,7,11,13)

  8. Minterm list --> canonical sum

  9. Algebraic simplification • Theorem T8, • Reduce number of gates and gate inputs

  10. Resulting circuit

  11. Visualizing T10 -- Karnaugh maps

  12. 3-variable Karnaugh map

  13. Example: F = S(1,2,5,7)

  14. Karnaugh-map usage • Plot 1s corresponding to minterms of function. • Circle largest possible rectangular sets of 1s. • # of 1s in set must be power of 2 • OK to cross edges • Read off product terms, one per circled set. • Variable is 1 ==> include variable • Variable is 0 ==> include complement of variable • Variable is both 0 and 1 ==> variable not included • Circled sets and corresponding product terms are called “prime implicants” • Minimum number of gates and gate inputs

  15. Prime-number detector (again)

  16. When we solved algebraically, we missed one simplification -- the circuit below has three less gate inputs.

  17. Another example

  18. Yet another example • Distinguished 1 cells • Essential prime implicants

  19. Quine-McCluskey algorithm • This process can be made into a program, using appropriate algorithms and data structures. • Guaranteed to find “minimal” solution • Required computation has exponential complexity (run time and storage)-- works well for functions with up to 8-12 variables, but quickly blows up for larger problems. • Heuristic programs (e.g., Espresso) used for larger problems, usually give minimal results.

  20. Lots of possibilities • Can follow a “dual” procedure to find minimal products of sums (OR-AND realization) • Can modify procedure to handle don’t-care input combinations. • Can draw Karnaugh maps with up to six variables.

  21. Real-World Logic Design • Lots more than 6 inputs -- can’t use Karnaugh maps • Design correctness more important than gate minimization • Use “higher-level language” to specify logic operations • Use programs to manipulate logic expressions and minimize logic. • PALASM, ABEL, CUPL -- developed for PLDs • VHDL, Verilog -- developed for ASICs

  22. ABEL • Advanced Boolean Equation Language • Developed for use with programmable logic devices, which have a programmable AND-OR structure. • Combinational logic functions • Operators: • Sets: • Relations: • Intermediate variables AND, OR, NOT, XOR, XNOR & # ! $ !$ XBUS = [X3,X2,X1,X0]; XBUS = [1,1,0,1]; XBUS = 13; (XBUS == YBUS) (XBUS > [1,1,0,1])

  23. ABEL Program Structure

  24. ABEL Example

  25. ABEL Example (continued)

  26. ABEL language processor (compiler) • Checks syntax • Checks device-pin capabilities • Expands language statements and equations • Reduces equations into sum-of-products form form for programmable logic device (PLD) • Checks test vectors against equations • Checks equation requirements (# of inputs, product terms) against PLD resources • Determines “fuse map” to program the PLD

  27. ABEL equations (.eq3) file

  28. ABEL equations file (continued)

  29. ABEL WHEN Statements

  30. Nested WHEN statements • Note: different variables can be used in different THEN and ELSE clauses

  31. Next time • PLDs (target of ABEL programs) • Documentation standards

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