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Chapter 4. Modular Combinational Logic. Decoders. Decoders. n to 2 n decoder n inputs 2 n outputs For each input, one and only one output will be active. Uses: “Minterm generator” Wordline (memory) circuit Code conversion Routing data. 2 to 4 Decoder Example.
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Chapter 4 Modular Combinational Logic
Decoders • n to 2n decoder • n inputs • 2n outputs • For each input, one and only one output will be active. • Uses: • “Minterm generator” • Wordline (memory) circuit • Code conversion • Routing data
2 to 4 Decoder – Truth Table • 2 to 4 decoder
2 to 4 Decoder: Block Symbol Symbol Circuit
3 to 8 Decoder: Block Symbol Symbol Circuit
Example • Using only a 3x8 decoder and two-input OR gates, design a logic circuit which implements the following Boolean equation
Solution m2 m4 m5
2x4 Decoder with Enable • Enable is abbreviated as EN • EN is called a Control Signal • Control Signals can be • Active High Signal • EN = 1 – Turns “ON” Decoder • Active Low Signal • EN=0 – Turns “ON” Decoder
2 x 4 Decoder with Active High Enable – Truth Table (Short hand notation) d = don’t care En has “highest” priority. If En=0, we “don’t care” about x1 or x0 because Y=0
2 x 4 Decoder with Active Low Enable – Truth Table (Short hand notation) d = don’t care En has “highest” priority. If En=1, we “don’t care” about x1 or x0 because Y=0
Example • Design a 3x8 decoder using only 2x4 decoders and NOT gates.
Solution “On” when A=0 “On” when A=1
Encoders • Opposite of a decoder • 2n to n encoder • 2n inputs • n outputs • For each input, the circuit will produce an “encoded” output
Example: 4to 2 Binary EncoderTruth Table Assume only one input high at a time!!
Problems with initial design • Q: How do we tell the difference between an input of all 0’s (i.e. X=0) and X=1? • A: Add another output (IA) that indicates that the input is valid. Let’s make IA active low.
Problems with initial design If IA = 1 => all lines are 0 If IA = 0 => at least one line is 1 • Q: What happens if more than one input is high at the same time? • A: Design a “priority” encoder that will encode the input with the highest priority. • Let’s set X3 with the highest priority, followed by X2, X1, and X0
Solution 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Y1 Y0
Multiplexer/Data Selectors MUX Very Important Module!!!
Multiplexer(MUX)/Data Selector • N to 1 multiplexer • n data input lines • Log2(n) control inputs • One output • This circuit will “connect” the selected input to the output. The selected input is specified by a decoding of the control inputs.
Example: 4to 1 MUX Truth Table Control Inputs Output Data Inputs d = don’t care / Di = data on input i
4 to 1 MUX Equation D’s are the DATA inputs, AB are control inputs and called the “select” lines.
4 to 1 MUX Circuit Control Inputs Data Inputs Output 2x4 Decoder Only a single AND gate will be “ON” at a time.
4 to 1 MUX Symbol Data Inputs Output Control Inputs
Data and Control Paths Control Path Outputs Logic Data Path Inputs Data Path Outputs Control Path Inputs
Example • Using a 4x1 MUX, design a logic circuit which implements: We have, Y
Example • Using a 4x1 MUX, design a logic circuit which implements: