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EE 316 Computer Engineering Junior Lab

EE 316 Computer Engineering Junior Lab. Lecture on PC Parallel port. The IEEE 1284 parallel interface standard.

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EE 316 Computer Engineering Junior Lab

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  1. EE 316Computer Engineering Junior Lab Lecture on PC Parallel port

  2. The IEEE 1284 parallel interface standard Parallel ports are used for connecting a computer (host) to a printer or certain other peripheral devices over a parallel (eight bits of data at a time) physical and electrical interface. Parallel ports conform to the specifications of document of the Institute of Electrical and Electronic Engineers (IEEE) called IEEE Std 1284-1994: Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers, or IEEE 1284 for short. http://whatis.techtarget.com/definition/0,,sid9_gci213469,00.html http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf

  3. Modes of operation (The IEEE 1284 standard) • Compatibility mode (Default “Forward” mode) • Nibble mode (4-bit “reverse” mode) • Byte mode (8-bit “reverse” mode) • EPP mode(Enhanced Parallel Port mode) • ECP mode(Enhanced Capability Port mode) Forward: Host to Peripheral Reverse: Peripheral to Host Source: http://www.lvr.com/files/ppc1.pdf

  4. 25 Pin D-sub or IEEE 1284-A connectors http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf

  5. 36 Pin Centronics or IEEE 1284-B connectors http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf

  6. IEEE-1284 compliant Parallel Printer CablesConnector Types IEEE-1284 Printer Type “A” Connector (DB25) This is the connector most commonly used as the computers parallel port output. IEEE-1284 Printer Type “B” Connector (CN36)This is the most commonly used connector for the end of the cable that goes to the printer. IEEE-1284 Printer Type “C” Connector (HPCN36)This is a new connector for the printer end of the cable. http://www.ramelectronics.net/html/ieee-1284_printer_cables.html

  7. DB-25 Female D-type Connector (on the computer) • 8 output pins accessed via the DATA Port (bidirectional) • 5 input pins (one inverted) accessed via the STATUS Port (peripheral to HOST) • 4 output pins (three inverted) accessed via the CONTROL Port (output only) • The remaining 8 pins are grounded http://www.doc.ic.ac.uk/~ih/doc/par/index.html#index

  8. Standard parallel port uses three contiguous addresses: 3BCh, 3BDh, 3BEh (LPT1) 378h, 379h, 37Ah (LPT1, LPT2) 278h, 279h, 27Ah (LPT1, LPT2, LPT3)) First Address -- Port base address (data registers) Second Address -- (base+1) Port’s status registers Third Address – (base+2) Ports Control Registers In our lab we have a PCI parallel card that uses the Following address: DF18h, DF19h, DF1Ah Addressing

  9. Parallel port output drive capabilities The outputs of the data registers are filtered through A 27 Ohm resistor and a 2.2 nF capacitors. The numbers can vary substantially between different port types. For fast transitions and more drive currents it is best to use Schmitt-trigger buffers/inverters at the receiving end. http://www.hut.fi/Misc/Electronics/circuits/lptpower.html

  10. References http://www.lvr.com/files/ppc1.pdf http://whatis.techtarget.com/definition/0,,sid9_gci213469,00.html http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf http://www.doc.ic.ac.uk/~ih/doc/par/index.html#index http://www.epanorama.net/circuits/parallel_output.html http://www.hut.fi/Misc/Electronics/circuits/lptpower.html

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