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EE 316 Computer Engineering Junior Lab. Project 1: Traffic Light Controller. The traffic Light Controller. Source: John Wakerly. Specifications. EW street is heavily traveled NW street is lightly traveled Pedestrian can halt traffic for crossing but not create traffic jam
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EE 316Computer Engineering Junior Lab Project 1: Traffic Light Controller
The traffic Light Controller Source: John Wakerly
Specifications • EW street is heavily traveled • NW street is lightly traveled • Pedestrian can halt traffic for crossing but not create traffic jam • EW, NS and Pedestrian traffic signals have at least Green and Red lights • Each green light is on for 5, 9 and 4 secs, respectively
Remember! The design cycle involves: • Careful planning • Learning • Setting specific goals • Designing • Building • Testing and • Troubleshooting
Design Methodology • Study the details in the Specification (read between lines). • Partition the design problem into smaller sub-components or parts. • Create specifications for each part and their interactions with others. Design and build each of the basic components/parts and test them thoroughly before attempting to combine with or connect to other sub-components. • Predict what to expect at each step and decide how would you test your hypothesis with measurements.
Design Methodology (contd.) • Test the circuit and verify if your design worked as expected • Troubleshoot your circuit if design does not work. Pay attention to power/ground lines, interfaces/ports (pin diagram and wires), fanout, drive currents (TTL vs. CMOS), bad connections, wrong delays etc. • Modify the design if needs and repeat the steps. • Write every step in the Notebook (legible documentation please). Draw circuit diagrams, pin diagrams chips, test and measurement results, troubleshooting, and design changes etc.
A partial list of subcomponents • A state machine (sequential circuit) • Counter/timer • Clock generator circuit • 7-segment displays • LEDs to be used as traffic signals • PC and XP compatible software
The state machine and the controller • State diagram/table and outputs • State assignment and K-maps • A timer/counter to be used as a controller to trigger transition from one state to the other depending on the inputs
Counter/Timer and clock generation circuit • Identify a TTL or CMOS based 7400 series chip that would be appropriate for this project • Study the data sheet carefully before using any chip • Verify the clock frequency with an oscilloscope. • Use the digital logic analyzer to verify design
7-Segment Displays and LEDs You will need appropriate Drivers for the two kinds Of displays. Also, remember LEDs/displays can be destroyed very easily. Use resistors to limit current http://www.play-hookey.com/digital/experiments/seven_seg_led.html
More details • Add bypass capacitors between VDD and GND if you cannot explain state skips or strange behaviors.
The IEEE 1284 parallel interface standard Parallel ports are used for connecting a computer (host) to a printer or certain other peripheral devices over a parallel (eight bits of data at a time) physical and electrical interface. Parallel ports conform to the specifications of document of the Institute of Electrical and Electronic Engineers (IEEE) called IEEE Std 1284-1994: Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers, or IEEE 1284 for short. http://whatis.techtarget.com/definition/0,,sid9_gci213469,00.html http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf
Modes of operation (The IEEE 1284 standard) • Compatibility mode (Default “Forward” mode) • Nibble mode (4-bit “reverse” mode) • Byte mode (8-bit “reverse” mode) • EPP mode(Enhanced Parallel Port mode) • ECP mode(Enhanced Capability Port mode) Forward: Host to Peripheral Reverse: Peripheral to Host Source: http://www.lvr.com/files/ppc1.pdf
25 Pin D-sub or IEEE 1284-A connectors http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf
36 Pin Centronics or IEEE 1284-B connectors http://www.lavalink.com/fileadmin/white_papers/ieee1284_parallel_ports.pdf
IEEE-1284 compliant Parallel Printer CablesConnector Types IEEE-1284 Printer Type “A” Connector (DB25) This is the connector most commonly used as the computers parallel port output. IEEE-1284 Printer Type “B” Connector (CN36)This is the most commonly used connector for the end of the cable that goes to the printer. IEEE-1284 Printer Type “C” Connector (HPCN36)This is a new connector for the printer end of the cable. http://www.ramelectronics.net/html/ieee-1284_printer_cables.html
DB-25 Female D-type Connector (on the computer) • 8 output pins accessed via the DATA Port (bidirectional) • 5 input pins (one inverted) accessed via the STATUS Port (peripheral to HOST) • 4 output pins (three inverted) accessed via the CONTROL Port (output only) • The remaining 8 pins are grounded http://www.doc.ic.ac.uk/~ih/doc/par/index.html#index
Standard parallel port uses three contiguous addresses: 3BCh, 3BDh, 3BEh (LPT1) 378h, 379h, 37Ah (LPT1, LPT2) 278h, 279h, 27Ah (LPT1, LPT2, LPT3)) First Address -- Port base address (data registers) Second Address -- (base+1) Port’s status registers Third Address – (base+2) Ports Control Registers In our lab we have a PCI parallel card that uses the Following address: DF18h, DF19h, DF1Ah Addressing
Parallel port output drive capabilities The outputs of the data registers are filtered through A 27 Ohm resistor and a 2.2 nF capacitors. The numbers can vary substantially between different port types. For fast transitions and more drive currents it is best to use Schmitt-trigger buffers/inverters at the receiving end. http://www.hut.fi/Misc/Electronics/circuits/lptpower.html
Project Reports • Each project writer is to submit a project report containing: • Summary (Executive summary or abstract) • Design Problem Statement • Problem Decomposition • Significant details of design process • Alternative designs • Design Documentation • Schematics documenting your hardware design • HDL and test bench files (for future reports • Software design, i.e. flowchart or pseudocode • Testing: • Module level testing • Specification testing • Performance Results and Analysis • References
References http://www.lvr.com/files/ppc1.pdf http://whatis.techtarget.com/definition/0,,sid9_gci213469,00.html http://www.doc.ic.ac.uk/~ih/doc/par/index.html#index http://www.epanorama.net/circuits/parallel_output.html http://www.hut.fi/Misc/Electronics/circuits/lptpower.html