LPRDS – CMS – 2011

1. LPRDS – CMS – 2011 Per Cell Management Design

2. Presentation Outline • Introduction • Project Goals • One Board Per Pack • ESS Controller Board • System Communication • Mechanical Design • ATP / Requirements Analysis • Budget • Schedule

3. Presentation Outline • Introduction • Project Goals • One Board Per Pack • ESS Controller Board • System Communication • Mechanical Design • ATP / Requirements Analysis • Budget • Schedule

6. 3-year Senior Design Project 2009 Legacy Work 2010 Legacy Work 2011 Projected Work

7. Lafayette Photovoltaic Research and Development System (LPRDS) LCD Display SCADA Interface Box (SIB) Fit PC System Status Display Filter Inverter Box (FIB) Switch Controller / Energy Management Unit (SC / EMU) Energy Storage System (ESS) Energy Storage System (ESS) Transformer

8. LPRDS-CMS-2011 • Finish a per-cell balancing scheme for the 64-cell LiFePO4 battery pack. • Complete design so that energy storage system is capable of being utilized by the LPRDS system.

9. Plan of Work • Develop a “Slave Board” (OBPP PCB) which will balance during charge/discharge a pack of 4 cells • Develop a “Master Board” (ESSCB PCB) which will control the functioning of the OBPPs to charge/discharge/bypass a particular cell. • Develop a “Stand-alone” mode for the OBPP in which a pack and OBPP together do not need the master to make decisions for bypassing during charge/discharge.

10. Aggregate Battery Stack with OBPP PCBs Energy Storage System Master Controller Board (ESSCB PCB)

12. Presentation Outline • Introduction • Project Goals • One Board Per Pack • ESS Controller Board • System Communication • Mechanical Design • ATP / Requirements Analysis • Budget • Schedule

13. Project Goals • Develop a One Board Per Pack PCB which can handle the balancing of a 4-cell battery pack. • Modify previous ESS Controller Board which can control individual OBPP packs for total pack charging/discharging. • Develop method of visually demonstrating operation of ESS.

14. Presentation Outline • Introduction • Project Goals • One Board Per Pack • ESS Controller Board • System Communication • Mechanical Design • ATP / Requirements Analysis • Budget • Schedule

15. One Board Per Pack (OBPP)

16. One Board Per Pack :: Key Features • Individual cell balancing capabilities • Two Modes of Operation (Slave & Stand-alone) • Boots in Stand-alone Mode • LEDs indicating operational state of pack • LEDs indicating operation of bypass • Scalability • Temperature Fail-Safe System

17. One Board Per Pack :: Design

18. One Board Per Pack :: Design • Resistive burn-off bypass solution • Independent redundant temperature safety system (RTSS) • Individually addressable packs for master-slave configuration • Stand-alone operation with charge state controlled open collector output • Implements I2C communication in master-slave configuration • *Current sensing capability

19. Cell Balancing Design • Breakdown of design trade-offs • Active vs. Passive Balancing • Level of Integration • Delegation between Controller and OBPP boards • Scalability • Layout Space • Cost • Manufacturability • Availability

20. Active Vs. Passive Balancing • Active: Using capacitive or inductive loads to shuttle charge from higher charged cells to lower charged cells. • Is more efficient from a power perspective • Has scalability issues • OBPP boards are larger and handle more work • Manufacturability issues

21. Active Vs. Passive Balancing • Passive: Bypasses cells and burns off the excess charge from the cell. • Better large-stack scaling • Burn off can be significant • Controller board handles decision-making

22. Bypass Design • Grounding the floating reference • Choosing a resistor value • Choosing a suitable transistor

23. Bypass Design – Resistor Choice

24. Bypass Design

25. Bypass Design – Transistor Simulation These numbers give a maximum power dissipation of 2.122 * 1.5 = 6.74W, which is about 35 degree temp rise using the thermal resistance of the resistor alone.

26. Bypass – Final Thoughts • Only the most recent simulations • Several different iterations of components and control schemes • Final design can reasonably bypass 1/5 C at full charge • Limitations of the bypass circuit heavily influenced the balancing algorithm

27. Critical Monitoring • Battery Voltages • Temperature • On board and RTSS • Current • Direction and Amplitude • Open-Drain Output • Optional Automatic Control • Fuse

28. Critical Monitoring - Voltage

29. Critical Monitoring - Voltage • Difference Amp to buffer and isolate battery voltages • Monitors for voltage thresholds that indicate a full or empty state • Balancing algorithm requires them

30. Critical Monitoring - Temperature • RTSS discussed later • Voltage output temperature sensors for non-critical temperature monitoring

31. Critical Monitoring - Current • A relatively new addition • Gives a way to independently judge whether the pack is charging or discharging • Required for the balancing algorithm

32. Critical Monitoring – Output Pin • Based entirely on OBPP calculations • Allows the user to have a charging circuit that is autonomous • An open drain output from the microcontroller

33. Critical Monitoring - Fuse • Another new addition • Will protect the CMS from currents above 25A

34. Digital I/O • Master/OBPP communications will be over I2C • OBPP will have a 4 bit switch addressing • OBPP will transfer from Standalone to Slave when I2C becomes active • Master commands override OBPP automated tasks

35. Redundant Temperature Safety System (RTSS) • Independent functionality to shut down system when temperature exceeds 65°C • Connection to each OBPP using AD22105 “Low Voltage, Resistor Programmable Thermostatic Switch” Integrated Circuit • (Setpoint accuracy = 2°C) • When any board exceeds the temperature limit, the switch within the safety loop is activated and the system shuts down.

36. Overall RTSS • Does not work as stand-alone pack • Must be connected to ESSCB Safety Loop

37. RTSS parts on OBPP To other OBPPs

38. OBPP Connection to Safety Loop to OBPPs

39. OBPP Thermal Analysis (Charging/Discharging) Copper FR4 (Circuit board) Aluminum Lithium Iron Phosphate (Aluminum) Acrylic Plastic

40. OBPP Thermal Analysis (Bypass Scenario) Copper FR4 (Circuit board) Aluminum Lithium Iron Phosphate (Aluminum) Acrylic Plastic

41. Stationary Analysis (1 cell heating)

42. Stationary Analysis (4 cells heating)

43. Stationary Analysis (Conductive slabs)

44. Stationary Analysis (Bypass scenario)

45. Time Dependent (1 cell)

46. Time dependent (Bypass Scenario)

47. OBPP Operational Verification • Bypass LEDs to indicate resistive bypassing • LEDs to indicate charge/discharge and mode of operation Solid – Charged Blink – Charging Solid – Discharged Blink – Discharging Solid – Slave Blink – Stand-alone Solid – Bypassing

48. OBPP Additional Notes • Multiple levels of electrical isolation • Microcontroller/bypass loop • I2C on OBPP and Master board • RTSS isolated as well

49. OBPP Firmware • Stand-alone Mode • Slave Mode • Cell Balancing Algorithm

50. OBPP Firmware - Standalone • Begins after a reset or losing the I2C clock signal • Watches for voltage thresholds • Cell balancing is enabled • Waits for I2C connection • First firmware development milestone