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New techniques in particle detection. Some personal opinions on trends. Advanced Research Workshop 16-20/05/ 2005. Jean-Robert Lutz. Outline. - Trends in particle detection - Issues Implementations of existing techniques - Conclusions. Cost Yield Pitch. Cost Yield Pitch.
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New techniques in particle detection Some personal opinions on trends Advanced Research Workshop 16-20/05/2005 Jean-Robert Lutz
Outline - Trends in particle detection - Issues • Implementations of existing techniques - Conclusions
Cost Yield Pitch Cost Yield Pitch From the past … Particle Sensor Amplifiers Read out Split Sensitive Volume Wiring ? Wiring ? Granularity? Granularity Sensitivity ? Sensitivity Noise ?
Silicon Integrated Circuit Sensor Ampli- fiers Analog MUX Amplifiers ADC Digital Out Silicon front-end Integrated Circuit Cost Yield Pitch Cost Yield Pitch Ampli- fiers Analog MUX … to the future 0.5-5 Mchannels typically Particle Silicon Sensor Read out ADC Wiring ? Wiring Wiring ? Wiring Granularity Sensitivity Noise ? Noise
Sensor Digital Out Ampli- fiers MUX ADC The ultimate sensor may exist Sensor, Amplifier, MUX, ADC, Digital Out In ONE Silicon INTEGRATED CIRCUIT Particle This object exists in each camera forlight CMOS pixel sensors are being developed for particles Working samples exist … Candidate for STAR tracker upgrade
CMOS pixel sensors Sébastien HEINI, Yann HU, Marc WINTER (IReS - LEPSI)
Back to present Granularity needed for geometric resolution But corresponding wirings face … • Technologic limit • Cost limit Available wiring option • Wire bonding • …
Wire bonding Basic 2D wiring option But 3D ?
Wire bonding Basic 2D wiring option Well known technique Possible to remove a bond But: • No flexibility for 3D • Pitch adapter for sensor • High inductance • Limited testability
How to deal with huge number of wirings and connections while keeping granularity? Change wiring technique • from Wire bonding • to Tape bonding
TAB: Tape Automated Bonding Everybody has TAB in his pocket TABconnection for CB • Wide pitch (mm) • Limited # connections • Large production • Au layered Cu • Bonding @ high T° • Reliability • Connects thin IC
128 inputs 44µm pitch stagered 43 outputs 135µm pitch 6,08 mm 8,64 mm TAB: Tape Automated BondingMicrocables technique Our needs • Narrow pitch (<100µm) • ~200 connections/chip • Small production • Bonding @ low T° • Good radiation length • Mechanical flexibility • Connects thinned IC • Reliability • Testability Viking like chip
Tape of Cu-Au microcables • 75µm Kapton • Bending windows • 17,5µm Cu • 1 µm Au • 10k produced
(metal side) Chipcable in carrier test frame (kapton side)
TAB connection 135µm pitch 88µm 44µm pitch 300µm pitch 95µm pitch
TAB drawbacks Drawbacks • Exotic TAB shape to meet IC input pitch of 44µm • Radiation length of Cu+Au microcables and hybrids • Bonding @ high T° • Pollution of Si by Au & Cu
TAB improvement #1 Improvements 1. Design IC I/O to meet TAB pitch requirements 2. Integrate components to reduce wirings 3. Al microcables and hybrids provided by Ukraine
Input pitch 80µ Output pitch 125µ Output pitch 135µ Input pitch 44µ 8.7 x 6 = 52.2 mm2 Improvement #1: chip geometry Design IC I/O geometry to meet topology and pitch Sensor FE chip Hybrid 3.65 x 10.9 = 39.8 mm2
TAB improvement #2 Improvements 1. Design IC I/O to meet TAB pitch requirements 2. Integrate components to reduce wirings 3. Al microcables and hybrids provided by Ukraine
Improvement #2: integration of external components inside the IC 50 passive components 10 passive components
TAB improvement #3 Improvements 1. Design IC I/O to meet TAB pitch requirements 2. Integrate components to reduce wirings 3. Al microcables and hybrids provided by Ukraine
Improvement #3: Al chipcable Chipcables X0Al = 89.0mm X0Cu = 14.3mm X0Au = 3.3mm Cu+Au Al
Improvement #4: Al subhybrid Al = 2.8.10-6Ω.cm Cu = 1.7.10-6Ω.cm Au = 1.4.10-6Ω.cm Hybrids Cu+Au Al
Radiation length module Al option Cu STAR module X0Al = 89.0mm X0Cu = 14.3mm X0Au = 3.3mm Al ALICE module Al = 2.8.10-6Ω.cm Cu = 1.7.10-6Ω.cm Au = 1.4.10-6Ω.cm
How to deal with huge number of wirings and connections while keeping granularity? Find a way to check automatically • each chip • each connection to the chip • connection between electronic components
Improvement #5:JTAG inside the chip Control and test of chip inside and I/O
Improvement #6:JTAG on the FE hybrid Control and Board test inside and I/O (FEE)
Conclusions Wiring is a challenging issue Future belongs probably to detectors integrating sensor-FE-electronics Present can be significantly improved • Use of TAB bonding • Design FE-ICs to meet TAB requirements 3. Integrate components to reduce wirings • Use of Al microcables and hybrids • Use of automated test of wirings