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Optical CPU for Convergent Broadband Networks. Yung Jui (Ray) Chen Department of CSEE, UMBC ychen@umbc.edu. Intel Cisco JDSU. Intel Cisco JDSU Lucent*. Intel Cisco. Intel. Old Technology Never Dies.
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Optical CPU for Convergent Broadband Networks Yung Jui (Ray) Chen Department of CSEE, UMBC ychen@umbc.edu
Intel Cisco JDSU Intel Cisco JDSU Lucent* Intel Cisco Intel Old Technology Never Dies p2 - 33
Optics industry needs a killer-application device : versatile, high volume, and low cost
THE POWER OF COST-EFFECTIVE ELECTRONICS “When you find yourself competing with silicon, don’t.”– Arno Penzias •Availability ofInexpensive, High-Speed (Si) Electronics –Through data formats, protocol processing, traffic engineering and network control and management •High-SpeedSignal Processing Enables Robust Transmission – Forward errorcorrection(FEC),electronic dispersion compensation (EDC), and pre-distortion and multiplexing techniques for mitigating ISI and signal impairment due to fiber dispersion and nonlinearity, device deficiency, and noise… −FEC gives ~10-dB coding gain; EDC offers ~ 3-4 times distance increase for 10-Gb/s transmission in single- or multi-mode fiber −powerfulpre-distortion and multiplexing techniques shown to afford ultra-long-haul transmission without other dispersion compensation • Significant enhancement in networking flexibility and performance, system cost savings, and other innovative potential… p4 - 33
Outline • Convergent broadband networks • Optical CPU • The enabling device to elevate optics above its transport role • Key components in an Optical CPU • AWG (WDM mux/demux) • Optical switch matrix • The true essence of Moore’s law – scale down the device size • Conclusion p5 - 33
In a convergent network, we need to management the wavelengths
Optical CPUWavelength Selective Switch (WSS) 1XN WSS p7 - 33
Local Drop bus Local Add bus Local Local Local Local Add Add Add Add Local Local Local Local Drop Drop Drop Drop Degree of N (4) OXC/ROADM Using 1N WSS Building Block North In Out 1xN WSS 40*4 OADM splitter In West In East 40*4 OADM 40*4 OADM Out Out 40*4 OADM Out In South p8 - 33
LCOS for Wavelength-Selective Switching(Liquid Crystal on Silicon & Free-Space Optics) ICs Developed for HDTV displays Combines Si CMOS backplane with LC overlay - gives high resolution (1280 x 768 pixel) reflective display engine CMOS backplane is commercially available HDTV chip Takes advantage of extensive development in HDTV to create a low-cost, highly flexible optical switching core Source: G. Baxter et al (Engana); OFC 2006 p9 - 33
å å å å å å l l l l l l i i i i i i i i i i i i Optical CPU Schematic Diagram Optical Switch Matrix DEMUX MUX For PLC platform MUX/DEMUX = AWG Optical switch matrix = ? p10 - 33
o i dns(sini + sino) + ncL = m Arrayed Waveguide Grating Device Concept p11 - 33
Autoregressive Filter (Infinite Impulse Response) Ring resonator Mach-Zehnder interferometer Switching by Refractive mechanisms Moving Average Filter (Finite Impulse Response) Interference effect with zeros (optical path change of l/4 ) Resonance effect with poles (Optical path change of a fraction l) p12 - 33
1×8 WSS (40 l) on a 6 Inch PLC Wafer Broadcast and select Dn=1.5% Based on M-Z switches Processed by ANDevices p13 - 33
Silicon photonics III-V photonics Role of Index Contrast: Bend Radius and waveguide size Fiber Conventional PLC Ultra-high D PLC SiN/SiO2 SiN/Air 1 cm Si/SiO2 GaAs/Air 1 mm m 100 m HydexTM m 10 m m 1 m Index Contrast 1.5% 0.5% 35% 100% 0.75% p15 - 33
AWG Size Reduction Number of output channels= 16 Channel spacing= 200 GHz Free Spectrum Range= 8000 GHz p16 - 33
Joint Research Center of Photonics of the Royal Institute of Technology and Zhejiang University nanowires 500 nm 250 nm 5mm Baba’s design • Total size 40 x 50 mm (4 x 4 AWG) • In/out tappered to 2 mm width • Loss about 4dB/mm • Channel spacing 11 nm • Crosstalk -10 dB (for TE polarization) L. Liu, D. Dai, M. Dainese, L. Wosinski, and S. He, OSA Integrated Photonic Research and Applications/ Nanophotonics Topical Meeting, Uncasville, Connecticut, USA, April 24-28, 2006. Compact Arrayed Waveguide Grating Demultiplexers Based on Amorphous Silicon Nano-wires p17 - 33
Micro-Ring As an Optical Switch • Ring lengths determine: • FSR, central wavelength, and ring spectrum shape • Coupling coefficients determine: • Ring spectrum shape, bandwidth, and throughput (loss) • Ring losses determine: • Throughput (loss) i = TE or TM mode • Performance requirements for different applications • Filter: most-flat drop • Switch: not only flat drop, thru extinction ratio is also important p18 - 33
Effect of Ring Length Variation case 1 L1= 0 L2= 0 L3= 0 case 2 L1= 0 L2= -10 nm (0.002%) L3= -10 nm (0.002%) Simulation curve Due to another polarization case 3 L1= 0 L2= 22 nm (0.004%) L3= 105 nm (0.02%) Due to another polarization p19 - 33
Control a 3rd Order Lattice Ring Filter In-thru In-drop pads heaters • Simultaneously passband improvement and wavelength shift (no fine-tuning) • Power consumption is proportional to resonant frequency shift • 1 mW to shift 1 GHz of resonant frequency Chip fabricated by Little Optics p20 - 33
IN out1 out2 out3 outN Ring Based 1N Optical CPU • Each row of switches operates at one wavelength only(small tuning) • Multiple wavelengths can be “dropped” at the same out port • Rings are “tuned” to resonance (does not require precision resonance frequency) • Multicasting is possible • Thru leakage has no impact to the system AWG p21 - 33
Tunable Filter Array (of 8) by HydexTM Material (Dn/n~17%) Chip fabricated by Little Optics p22 - 33
Tunable Filter Array (of 8) by HydexTM Material (Dn/n~17%) Chip fabricated by Little Optics p23 - 33
Tunable Filter Array (of 8) by HydexTM Material (Dn/n~17%) Chip fabricated by Little Optics, packaged by ITRI p24 - 33
SILICON PHOTONICS Scaling Limitations of Thermo-optic Switch • Large unit cell size (due to heater size and thermal isolation requirement) • Slow response (msec) • Thermal and power management issues p25 - 33
Conclusion • Chip size WSS (Optical CPU) is a disruptive device) • It can bring out an end-to-end WDM network system • Many challenges still to be dealt with: • Efficient PLC materials • High index contrast • Reliable waveguide properties • Large and fast EO (or NLO) effects • Power issues • Outside control (switching) • On-chip power dissipation (thermal management) • Control and management • Si circuits may be required • Testing • SILICON PHOTONICS is a promising starting point • III-V PHOTONICS is the future direction p26 - 33
Local Add/Drop Bus • Each ring switch operates at full spectral range (large tuning) • Multiple wavelengths can “drop” from the trunk out port • Full trunk channel wavelengths are operational • Rings are “tuned” to resonance (does not require precision resonance frequency) • Thru leakage has no impact to the system N S E W A/Dport1 A/Dport2 A/Dport3 A/Dportn p27 - 33