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EE-2623 Mikroprosesor & Antarmuka

EE-2623 Mikroprosesor & Antarmuka. Materi 5 Komponen Digital Pendukung Team Dosen 2006. Dasar Sistem Mikroprosesor. Mikroprosesor. Data Bus. Address Bus. Control Bus. Memory. I/O. Diagram Fisik IC. Glue Chips. Mikroprosesor. Data Bus. Address Bus. Control Bus. Memory. I/O.

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EE-2623 Mikroprosesor & Antarmuka

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  1. EE-2623Mikroprosesor & Antarmuka Materi 5 Komponen Digital Pendukung Team Dosen 2006

  2. Dasar Sistem Mikroprosesor Mikroprosesor Data Bus Address Bus Control Bus Memory I/O

  3. Diagram Fisik IC

  4. Glue Chips Mikroprosesor Data Bus Address Bus Control Bus Memory I/O

  5. Chip Set(845,865,915,945,975,ICH5 dll) Mikroprosesor Data Bus South Bridge North Bridge + (VGA) Address Bus Control Bus Memory I/O

  6. Asumsi • Untuk sementara bus data dianggap tidak bermasalah • Konsentrasi ke bus alamat • Bus alamat: • Glue chips  address decoder • Fungsi : memetakan suatu/beberapa chip/IC memori ke peta memori

  7. Interface Memori • Umum : • memori = RAM (+ ROM) • Karakteristik : ukuran besar (kB) • Lebar = 8 bit = 1 byte (sesuai peta memori) • Waktu akses relatif cepat (dibandingkan divais lain)

  8. IBM PC memory map • Video Display RAM • CPU stores information in VDR • Video controller then displays it on the screen • Memory used depends on: • Adaptor type • Resolution • Mode of operation • Some memory is used for: • BIOS • BASIC Compiler • Hard disk controller • Expansion by user • 64KByte to 640KByte • (00000-003FF) interrupt vector table • (00400-004FF) BIOS temporary data area • (00500-005FF) temporary storage for DOS and BASIC • Some memory is occupied by DOS (depends on version)

  9. Teknik Memetakan IC ke Memori • Menentukan posisi IC  tabel alamat • Menghitung fungsi address decoder • Membuat rangkaian address decoder

  10. Tabel Alamat Pemetaan IC 4kB (A0-A11) ke ruang alamat i8088 1MB (A0-A19)

  11. SoalLatihan Terdapat: • Sebuahprosesor 8088 (20 alamatA0-A19) • 3 buah RAM 64k (/CS) • 2 buah RAM 32k (/CS1, CS2) • 1 buah ROM 128k (/CS1, /CS2, CS3) • Buatlah address decoder untuksistemdiatas

  12. Terdapat banyak (256) tempat yang mungkin di peta memori untuk memori 4kB • Peletakan memori tersebut tergantung pada kanal alamat yang “tersisa (A12-A19)” • Sehingga alat yang harus dibuat (address decoder) adalah alat pemilih lokasi yang berdasarkan input alamat tersisa tersebut. A12 lokasi 1 A13 lokasi 2 s/d A19 lokasi 256

  13. W O U T P U T I N P U T A X Y B Z Prinsip Kerja Address Decoder • Model sederhana dari address decoder sbb: W = A . B = A + B  W = A + B X = A . B  X = A + B

  14. Address Decoder Memori • Input : Ax – A19 • Output : lokasi 1 sd lokasi yy • Contoh : lokasi 1 = f(Ax, Ax+1, …, A19) • F = fungsi logika sederhana (and, nand, or, nor)

  15. s / d AD s / d

  16. Contoh soal: • Gambarkan address decoder untuk 2 buah IC RAM 64 kB (/cs1, /cs2) 2 buah IC RAM 256 kB (/cs) 3 buah IC ROM 64 kB (cs1, /cs2) di prosesor i8088 Lakukan dengan bertahap (mulai dari perencanaan sampai pembuatan rangkaian)

  17. Tabel Alamat Pemetaan IC 256kB (A0-A17) ke ruang alamat i8088 1MB (A0-A19)

  18. Tabel Alamat Pemetaan IC 64kB (A0-A15) ke ruang alamat i8088 1MB (A0-A19)

  19. Rencana (1) FFFFF 64 kB F0000 64 kB • RAM1 /cs = /A19 . /A18 • RAM2 /cs = /A19 . A18 • RAM3 /cs1=/cs2 = A19 . /A18 . /A17 . /A16 • RAM4 /cs1=/cs2 = A19 . /A18 . /A17 . A16 • ROM1 cs1 = A19 . A18 . A16 /cs2 = A17 • ROM2 cs1= A19 . A18 . A17 /cs2= A16 • ROM3 cs1=A19 . A18 . A17 . A16 /cs2= /cs1 E0000 64 kB D0000 9FFFF 64 kB 90000 64 kB 80000 256 kB 40000 256 kB 00000

  20. Interface Memori 8 IC RAM s / d AD s / d RAM1 RAM8 Latch s / d AD0 AD7 D7

  21. Soal PR (13-3-7) • 8088 mempunyaimemori : • 3 kelompok IC 64k (3*64KB) • 1 kelompok IC 128k (1*128kB) • 2 kelompok IC 32k (2*32kB) • Diinginkansemua IC tersebutmenempatialamatkontinudari 00000 sd 5FFFF, silahkansusundanbuat address decodernya

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