Size does matter Breaking the barriers of Wafer Level Packaging

1. Size does matterBreaking the barriers of Wafer Level Packaging Preliminary Summary

2. Introduction • Moore's Law heating a plateau as path to increased functionally and transistor count while lowering the cost/node • Limited applications can benefit from < 20nm process

3. Packaging - An Alternate Path • Inflection point for Advanced Packaging playing significant role as path to further integration and cost reduction • Leading OSAT, Foundry and IDM's are leveraging existing Assembly technology and Foundry resources • Traditional assembly equipment followed foundry path, and for WLP equipment supports Wafer form factor • Breaking the wafer form factor into larger panels for higher parallelism requires new tools for entire line

4. Work Area Illustration Panel vs. Wafer496K mm² >> ~7X !!! Vs 300mm Wafer = ~ 71K mm² • Lowest common denominator dictates limit for entire assembly process lineUniversal instruments WLCSP solution enables the highest accuracy over the largest work area without compromising UPH, offering best cost/performance for HVM 813mm x 610mm Panel Size

5. Theoretical Aspects • High Accuracy assembly of FC correlates to <5k cph and Lower Accuracy assembly at >8k cph • Speed vs Accuracy have opposing trends and normally can not merge on a single system • High Accuracy placement machines cannot go faster and High Speed machines cannot simply be more accurate by going slower. This is an inherent technical limitation • Merging of Semiconductor and SMT assembly technology enable new paradigm in placement equipment combining High Accuracy of SC assembly with SMT High Speed rates • This is the foundation of a platform technology / architecture, starting from the leveling pad, to the spindle/manipulator to handle the device to be placed

6. Architecture - Enabling Large Area Assembly Principle of construction - Sets foundation for large area assembly with no compromise in speed and accuracy • Robust construction with rigid base to manage vibration and isolation of neighboring vibrations • Linear Motor driven axis offer: • Fast motion response and settling times essential to speed and accuracy • No restriction to length of construction enabling by matching motor stator to the construction size • VRM vs Traditional permanent magnet linear motors • Traditional - susceptible to high temperature excursions in high duty cycle operation • Variable Reluctance Linear Motors (VRM) operate much cooler • Multiple heads spindles/manipulators reduce number of cycles between pick & place thus axis speed is less critical to overall assembly rates

7. Techniques – Enabling high accuracy placement Importance of Mapping • Due to mechanical non-uniformities, each positioning system is unique, thus any absolute vector from encoder position to a particular location to differ from the predicted location • Absolute moves over a large area are therefore impossible, i.e. having the axis move ½ meter in any direction from encoder (0,0) may result in a final destination of slightly < 0.5m on one system might be slightly > 0.5m on another • Solution: A machine map that correlates positioning system imperfections to encoder locations to machine locations

8. Techniques – Enabling high accuracy placement Enhanced Mapping • Mapping models behavior of the positioning system and relates encoder coordinate locations to machine coordinates • Machine locations are typically defined by the mapping plate(s) • Encoder locations are defined by the (X,Y) linear encoders located on the X and Y beams (axis) • Plate and grid sizes define the area and mapping resolution • Enhanced mapping process certifies measurements modeling the grid points, thus refining resolution by using actual grid positions over nominal positions

9. Enhanced Mapping illustration • In an encoder coordinate system, moving from P1 to P2 is purely an X movement • When the same movement is done in a machine coordinate system, both X and Y movements are required • Due to these spatial differences, both an X and a Y map are generated to translate between the two coordinate systems

10. Techniques to Accuracy Stability AOI feedback • Placement systems accuracy performance metrics are either self-verified or validated through capable automated optical inspection (AOI) systems • The challenge - while both processes may agree on repeatability they often do not agree on means, thus a method to align to a common reference is key for system use and for verification of duplicate systems • A method to apply AOI feedback into the placement system is essential to refine each placement or spindle bias to a nominal placement coordinate, enabling proficiency of multi spindle systems for higher throughputs without affecting accuracy Mold operations or thermal effects on materials. • High material counts and HVM can only be realized by leveraging the abilities of process feedback from the AOI systems • Feedback method supports post process steps requiring up stream corrections to accommodate / enhance final process performance conditions • Software utilities enable seamless import of offset data into the placement system

11. System Stability Dynamic Placement Calibration Verification • System stability is essential to high accuracy placement over variations in ambient temperature or operational duty cycles. • A unique self-monitoring method through self-calibration techniques or dynamic placement calibration verification (DPCV) is also required • DPCV uses verified reference artifacts to enable self-measurable change in placement performance for both repeatability and bias from an pre determined reference • Sub-micron measurement technique eliminates contribution of positioning system from the measurement error and detects true system change • Automatic operation can be triggered by preset thresholds in time, product or temperature, serving as indicators for preventive / scheduled maintenance, thus maintaining system performance stability

12. TAP - High Accuracy by Top Align Process • Traditional assembly technics align a device / die for placement based on its bottom features • Placement by top features is limited as the die active surface cannot be imaged while held by a pick tip or spindle/manipulator • These barriers can be eliminated through Top Alignment Process (TAP), where the die outline and the top active pattern are inspected simultaneously by a downward looking camera, setting reference between the two features • Following Top inspection the die is picked by nozzle and moved over an upward looking camera to set the relationship between die outline and spindle position • Top to Bottom correction is then applied by the TAP process, with the outline serving as reference, setting the final offset for die placement based on top features and eliminating inaccuracy caused by component shift between inspect and pick

13. CONCLUSION • Assembly of Semiconductor and SM share common requirements of High Speed and High Accuracy however they carry different numbers of reality • Semiconductor assembly has multiple requirements for pick and place solutions and can now realize complete system flexibility, from small strips to large panel sizes beyond wafer form factor and with <10um placement accuracy • This in turn enables low cost packaging in HVM, bringing economies of scale to technologies like WLCSP, eWLB, FOWLP, Embedded, SiP, RCP and COWOS