1 / 13

Project by : Sokolik Dmitry Instructor : Boaz Mizrahi digital lab

Video PAL encoder. Project by : Sokolik Dmitry Instructor : Boaz Mizrahi digital lab. Card Interface. Compressed data. Compressor. 16 bit. Pal. Control. I 2 C. To PCI. Functional Block diagram. 24.576 MHz. Aux. Bus. Compress unit. output interface. Video sampling. 33.333 MHz.

marge
Download Presentation

Project by : Sokolik Dmitry Instructor : Boaz Mizrahi digital lab

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Video PAL encoder Project by : Sokolik Dmitry Instructor : Boaz Mizrahi digital lab

  2. Card Interface Compressed data Compressor 16 bit Pal Control I2C To PCI

  3. Functional Block diagram 24.576 MHz Aux. Bus Compress unit output interface Video sampling 33.333 MHz Control unit LocalBus 9080 PCI Bus

  4. Maximum Compressed Data Rate is 16.67MHz

  5. Almost the end...

  6. Video Sampling 8 bit Video Bus Composite PAL SAA7111 LPF 24.576 MHz I2C PCF8584 • LPF - filtering high frequencies to prevent aliasing; • SAA7111 - Composite Video Decoder • 1) Control -- I2C protocol; • 2) 24.576 MHz clock. • 3) 27 MHz reading rate • 4) CCIR-656

  7. Compression unit Data in ADV601 Compressed Data • ADV601 -- wavelet video encoder ( also decoder ) ; • DRAM -- NEC uPD424210ALE-60 (256Kx16 bit ); • ADSP-2181 -- DSP providing algorithm calculations; • Compressed data -- 32 bit bus ( 8 , 16 bit optional ); • Control -- host interface; Control ADSP2181 DRAM

  8. Bin Width Calculator (BWC) Block Diagram Encoding BWC Application ADV601 ADSP2181 Serial Communication Bin Width Statistics

  9. Field timing diagram

  10. Control unit and output interface Local bus arbiter LHOLD PCF8584 interface I2C SAA7111 LHOLDA Data processing Local bus data ADV interface TO ADV

  11. 9080 • Slave • C bus mode • Burst mode

More Related