Toggle Equivalence Preserving (TEP) Logic Optimization

1. Toggle Equivalence Preserving (TEP) Logic Optimization Eugene Goldberg (Cadence), Kanupriya Gulati (Texas A&M University) Sunil Khatri (Texas A&M University) IWLS-2007, San Diego, USA This paper is available at http:/eigold.tripod.com/papers/iwls-2007-tep.pdf

2. Summary • Example of Logic Synthesis preserving Toggle Equivalence (LS_TE) • Escaping Local Minima in LS_TE • Novel Convergence Scheme • TEP procedure (example) • Some experimental results

3. Example square(x) < 100  abs(x) < 10 z z N*2 y < 100 N2 y* < 10 y1 … y2n y*1 y*n … N*1 N1 square(x) abs(x) … … Circuit N* Circuit N x1 xn x1 xn Subcircuit N1 is toggle equivalent to N*1. Subcircuit N2 is toggle equivalent to N*2 (under “allowable” input assignments)

4. Logic Synthesis preserving Toggle Equivalence (LS_TE) Given a single-output combinational circuit N partitioned into subcircuits N1,..,Nk, LS_TE is to produce a new circuit N* : replace each Ni with an optimized toggle equivalentN*i. Multi-output subcircuits Ni and N*i are toggle equivalent if Ni(p )Ni(p )  N*i(p )N*i (p ). Single-output subcircuits: Toggle equivalence  functional equivalence (modulo negation). Definition of toggle equivalence can be extended to the case when Niand Ni* have different input variables but there is a one-to-one mapping between “allowed” input assignments.

5. Importance of LS_TE(escaping local minima) z z R*2 N2 y < 100 Re-encoder z y1 y2n z* … N*2 N2 y* < 10 y < 100 R*1 Re-encoder y*1 y*n y1 … y2n … y*1 y*n … abs(x) abs(x) N1 square(x) N*1 N*1 … … … x1 xn x1 xn x1 xn Even if |N*i| < |Ni|, it maybe the case that |N*i| + |R*i| > |Ni| In terms of equivalent transformations, LS_TE may temporarily increase the circuit size.

6. TEP procedure (first introduction) Let M be a subcircuit Ni of N. For the sake of simplicity, we assume that M and M* have identical variables. Problem: Given a multi-output circuit M, build an (optimized) toggle equivalent circuit M*. y*1 … y*m y1 … yp M* M … … x1 xn x1 xn

7. Toggle Implication M, M* are multi-output circuits Toggle implication (denoted M  M*) M(p )M(p )  M*(p )M*(p ). M and M* are toggle equivalent iff M  M* and M*  M Strict toggle implication (denoted M < M*) if M  M* is true, but M*  M is not

8. Novel Convergence Scheme A TEP procedure, in general, can not re-use the structure of M. Then we need to sovle the convergence problem. Usually, the convergence problem is avoided by making functionally equivalent, incremental transformations. Alternatively, the convergence problem is solved byseverelyrestricting the class of implementations we consider. In SIS, it is sums-of-products. In BDDs, it is networks of multiplexers. We build a sequence of circuits M1,…,Md such that a) M  Mi and b) Mi < Mi-1 This sequence converges to a circuit M* such that a) M  M* and b) M*  M.

9. Example Targe circuit M* implements x1  x2 M1 = identity; // so M  M1 repeat {M = rem_toggles(Mi); Mi+1= add_toggles(M );} until (Mi+1  M) M1 Init. circuit First iter. Second iter. M rem_toggles rem_toggles add_toggles M2 M3

10. Experimental Results • We successfully applied our TEP procedure • to simplify large circuits implementing redundant • arithmetic expressions • to optimize small single-output circuits (up to 8 inputs) • to build toggle equivalent counterparts of small • multi-output circuits • d)to optimize a cascade of two circuits by LS_TE (TEP procedure was used twice)

11. Conclusions • Our TEP procedure can be used for developing new structure-agnostic synthesis algorithms • Besides, TEP procedure enables a powerful method of logic synthesis (LS_TE). • LS_TE suggests a way to address local minimum entrapment problem • LS_TE facilitates informational exchange with the designer (specification describes high-level structure of the circuit)