Essential Issues in Codesign: Architectures

1. Essential Issues in Codesign:Architectures Part of HW/SW Codesign of Embedded Systems Course (CE 40-226) Codesign of Embedded Systems

2. Today programme • Essential issues in codesign • Models • Architectures • Languages Codesign of Embedded Systems

3. Architectures • Supplements Models by specifying how the system will actually be implemented • Goal of each architecture is to describe • Number of components • Type of each component • Type of each connection among above components • General classification • Application-specific architectures: DSP • General-purpose architectures: CISC, RISC • Parallel processors: VLIW, SIMD, MIMD Codesign of Embedded Systems

4. Architectures:Controller Architecture • Most suitably match FSM model • Consists of • State register • Combinational blocks • Next-state logic • Output logic Codesign of Embedded Systems

5. Architectures:Datapath Architecture • Most suitably match DFG model • Straight-forward implementation • Each operation in one pipeline stage • Example: FIR filter • Other enhancements • Latches for inputs and outputs • Reducing number of functional units for one DFG • Execute multiple DFGs on a single datapath • Need simple controllers without conditional branches Codesign of Embedded Systems

6. Architectures:FSMD Architecture • Combination of Controller and Datapath architectures • Used for general-purpose processors as well as ASICs • Each ASIC can have one or more FSMD architectures, each with its own characteristics • Special cases • Controller and Datapath architectures • CISC and RISC architectures Codesign of Embedded Systems

7. Architectures:CISC Architecture • Main motivation • Reduce number of instructions in compiled code => minimize memory accesses • Useful when • Memory was slow and small • Programmers frequently used assembly • To support complex instructions • Has complex datapath • Has u-programmed control Codesign of Embedded Systems

8. Architectures:CISC Architecture (cont’d) • Clocks-per-instruction (CPI) varies for each instruction • Instruction pipelining is hard to implement • Relatively slow u-program memory => longer clock cycle • May not be well-suited for high-performance processors Codesign of Embedded Systems

9. Architectures:CISC Architecture (cont’d) • Most frequently used instructions are Simple instruction • Complex instructions are seldom or never used. Because of: • Slight semantic differences between complex instructions and PL constructs • Difficulty in mapping PL constructs into such complex instructions Codesign of Embedded Systems

10. Architectures:RISC Architecture • Optimized to achieve • Short clock cycles • Small number of CPI • Efficient pipelining of instructions Codesign of Embedded Systems

11. Architectures:RISC Architecture (cont’d) • General organization • Large register file + ALU • Pipeline stages: • Fetch • Decode & Operand Fetch • Exec. ALU operation or compute addr. for data cache • Data is stored in data-cache or register file Codesign of Embedded Systems

12. Architectures:RISC Architecture (cont’d) • Simple design => short clock cycle, higher performance, more complex compiler, larger compiled-code size Codesign of Embedded Systems

13. Architectures:VLIW Architecture • Very-Long Instruction-Word • Explicit Instruction-Level Parallelism (ILP) • Has • Multiple functional units in its datapath • One field for each FU in each VLIW instruction Codesign of Embedded Systems

14. Architectures:VLIW Architecture (cont’d) • Requires much higher bandwidth between cpu and memory/register file • Ideally N-times faster than normal processors. But really, • All operands are not always in registers • All FUs are not always utilized • Technological limitations • Efficiency and performance of register files • Requires high-pin packaging technologies Codesign of Embedded Systems

15. Architectures:Parallel Architectures • Multiple Processing Elements (PE) • SIMD (Single Instruction, Multiple Data) • MIMD (Multiple Instruction, Multiple Data) • SIMD or “Array Processor” • Centralized control unit • Multiple identical Pes • Usually communication just among neighbor PEs • Most useful in computations that naturally map into a rectangular grid • Image processing, Weather forecasting Codesign of Embedded Systems

16. Architectures:Parallel Architectures (cont’d) • MIMD or “Multiprocessor System” • Each processor can communicate with each other processor in the system • Communication mechanisms • Shared memory • Message passing • Both of the above Codesign of Embedded Systems

17. What we learned today • Architectures are block-diagram organizational guidelines for Implementationof systems. • Each Architecture is more suitable for a specific Model. Codesign of Embedded Systems

18. Complementary notes:Extra classes • “HW design using RenoirTM workshop” by A. Ganjei • Date-Time: Today, at 13 o’clock • Place: CE 316 (Here!) • Second session: Decide now • “HW Synthesis Techniques Seminar” by S. Safari • Postponed • Course webpage is ready. Regularly take a look at it Codesign of Embedded Systems

19. Complementary notes (cont’d) • Subscribe to course mailing list • Send an email from your desired email address to majordomo@ce.sharif.edu containing:subscribe ce226list • Assignment 2 • Project Codesign of Embedded Systems

20. Happy new year! Codesign of Embedded Systems