Metro II – Design Environment and Case Studies

1. required port 4. Enable some processes Component Phase 3 Phase 1 Phase 2 Logical Time provided port Wrapper P2 P1 Physical Time 3. Sched. Resolution R Resource Scheduler view port 1. Block processes at interfaces 2. Annotations IP Douglas Densmore Qi Zhu Alessandro Pinto Trevor Meyerowitz Alberto Sangiovanni-Vincentelli Metro II – Design Environment and Case Studies Metro II Integration • Metro II Design Goals • Metro II attempts to address the following issues: • Import heterogeneous IP • Different languages • Different models of computation • Behavior-Performance Separation • No explicit requests for annotation • Annotation separated from scheduling • Operational/Denotational Separation • Restricted access to events and values • Mapping carried out at component level Func. Comp Arch. Comp Communication Synthesis, NOC synthesis, and physical modeling of interconnection and logic Mapper Metro II Components m2_manager Mapper Adaptor Annotator Scheduler m2_port m2_interface m2_component m2_method Constraints m2_event Metro II Core sc_module sc_event Implementation Platform: SystemC 2.2 Not currently implemented Implementation started • Metro II Overall Execution Semantics • Pros • Phase 1 objects no longer explicitly request annotation • Separation of quantity managers into annotators and schedulers • “Global time” separates into physical time (annotation) and logical time (scheduling) • Cons • Additional phase introduced into execution model (potential simulation overhead) Metro II Case Studies H.264 • Three Phase Execution Details • Base • Each process proposes events and suspends • Multiple events can be proposed simultaneously • by one process • Annotation • Tag proposed events with quantities • Scheduling • Rejection of some proposed events Base UMTS Annotation • Process Networks MoC • - Rendezvous • 3,750 lines of code (SystemC) • < 40 lines modified • - Begin and end of each rendezvous exposed as events Scheduling • DLL layer of UMTS SystemC code converted to Metro II. • Cycle accurate Sparc processor model converted to Metro II. Works with annotator to provide dynamic information at runtime. • Simulation environment being created using all Metro II components to investigate the performance of a mapped system. Center for Hybrid and Embedded Software Systems