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Thermal Issues References • “Thermal considerations in cooling large scale high compute density data centers” Patel, C.D.; Sharma, R.; Bash, C.E.; Beitelmal, A. Termal and Thermomechanical Phenomena in Electronic Systems, 2002. ITHERM 2002. The Eighth Intersociety Conference on , 2002, Page(s): 767 -776 • “A system design approach to liquid-cooled microprocessors”, Dickinson, R.D.; Novotny, S.; Vogel, M.; Dunn, J. Thermal and Thermomechanical Phenomena in Electronic Systems, 2002. ITHERM 2002. The Eighth Intersociety Conference on , 2002, Page(s): 413 -420 • “Packaging the Itanium microprocessor” Hong Xie; Watwe, A.; Yusuf, I.; Cherukuri, N.; Brandenburger, P.; Kay, A.; Chandran, B. Electronic Components and Technology Conference, 2002. Proceedings. 52nd , 2002, Page(s): 583 –589 • “High performance package designs for a 1 GHz microprocessor “, Hasan, A.; Sarangi, A.; Baldwin, C.S.; Sankman, R.L.; Taylor, G.F. Advanced Packaging, IEEE Transactions on, Volume: 24 Issue: 2 , Nov. 2001, Page(s): 470 -476
Thermal Issues References • “The IA-64 Itanium processor cartridge”, Samaras, W.A.; Cherukuri, N.; Venkataraman, S. IEEE Micro , Volume: 21 Issue: 1 , Jan.-Feb. 2001, Page(s): 82 -89 • “Novel thermal validation metrology based on non-uniform power distribution for Pentium(R) III Xeon cartridge processor design with integrated level two cache” Teck Joo Goh; Amir, A.N.; Chia-Pin Chiu; Torresola, J. Electronic Components and Technology Conference, 2001 Proceedings., 51st , 2001, Page(s): 1181 -1186 • “An accelerated reliability test method to predict thermal grease pump-out in flip-chip applications” Chia-Pin Chiu; Biju Chandran; Mello, K.; Kelley, K. Electronic Components and Technology Conference, 2001. Proceedings., 51st , 2001, Page(s): 91 -97 • “Characterization of laminar jet impingement cooling in portable computer application” Guarino, J.R.; Manno, V.P.Semiconductor Thermal Measurement and Management, 2001. Seventeenth Annual IEEE Symposium , 2001 Page(s): 1 -11
Thermal Issues References • “Study of heatsink grounding schemes for GHz microprocessors” Radhakrishnan, K.; Wittwer, D.; Yuan-Liang Li Electrical Performance of Electronic Packaging, 2000, IEEE Conference on. , 2000 Page(s): 189 -192 • “Reliability of commercial plastic encapsulated microelectronics at temperatures from 125C to 300C” McCluskey, P.; Mensah, K.; O'Connor, C.; Lilie, F.; Gallo, A.; Fink, J. Aerospace Conference Proceedings, 2000 IEEE , Volume: 5 , 2000 Page(s): 445 -450 vol.5 • “Packaging technology for high performance CMOS server Fujitsu GS8900” Fujisaki, A.; Suzuki, M.; Yamamoto, H. Electronic Components & Technology Conference, 2000. 2000 Proceedings. 50th , 2000 Page(s): 920 -924 • “High performance package designs for a 1 GHz microprocessor” Hasan, A.; Sarangi, A.; Baldwin, C.S.; Sankman, R.L.; Taylor, G.F.Electronic Components & Technology Conference, 2000. 2000 Proceedings. 50th , 2000 Page(s): 1178 -1184 • “Application of phase-change materials in Pentium (R) III and Pentium (R) III Xeon processor cartridges” Chia-Pin Chiu; Solbrekken, G.L.; LeBonheur, V.; Xu, Y.E. Advanced Packaging Materials: Processes, Properties andInterfaces, 2000. Proceedings. International Symposium on , 2000 Page(s): 265 -270
Thermal Issues references • “Cartridge thermal design of Pentium/sup (R)/ III processor for workstation: giga hertz technology envelope extension challenges” Teck Joo Goh; Amir, A.N.; Chia-Pin Chiu; Torresola, J. Electronics Packaging Technology Conference, 2000. (EPTC 2000). Proceedings of 3rd , 2000 Page(s): 65 -71 • “Integrated heat sink-heat pipe thermal cooling device” Yusuf, I.; Watwe, A.; Ekhlassi, H. Thermal and Thermomechanical Phenomena in Electronic Systems, 2000. ITHERM 2000. The Seventh Intersociety Conference on , 2000 Page(s): 27 -30 vol. 2 • “Refrigeration technologies for sub-ambient temperature operation of computing systems”Ghoshal, U.; Schmidt, R. Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International , 2000 Page(s): 216 -217, 458 • “Low temperature CMOS experience at IBM” Schmidt, R. Semiconductor Thermal Measurement and Management Symposium, 2000. Sixteenth Annual IEEE , 2000 Page(s): 112 -113 • “Heat spreader attach: a microprocessor thermal solution” Starr, O.; Master, R.N.; Khan, M.Z.; Tain, A.; Ding, D.H.; Juwanda, A. Electronic Components and Technology Conference, 1999. 1999 Proceedings. 49th , 1999 Page(s): 238 -242
Thermal Issues references • “The development of component-level thermal compact models: the Motorola PowerPC 603 and PowerPC 604 RISC microprocessors” Parry, J.; Rosten, H.; Kromann, G.B. Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on, Volume: 21 Issue: 1 , March 1998 Page(s): 104 -112 • “Influence of Temperature on Microelectronics and System Reliability: A Physics of Failure Approach” ISBN: 0849394503, 1997 Pradeep Lall; Michael Pecht; Edward B Hakim • “Temperature Measurement” ISBN: 080198385 1993Bela G Lintak • “Air Cooling Technology for Electronic Equipment” ISBN: 0849394473 1996 Sung Jin Kim; Sang Woo Lee“The Electronic Packaging Handbook” ISBN: 0849385919 1999 Glenn R Blackwell • “Thermal Design of Electronic Equipment” ISBN: 0849300827 2000 Ralph Remsburg • “Thermal Measurements in Electronics Cooling” ISBN: 0849332796 1997 Kaveh Azar
TEC references • D.M. Rowe. “CRC Handbook of Thermoelectronics” CRC Press, 1995. • B.J. Huang et al. “A design method of thermoelectric cooler” International Journal of Refrigeration, 2000. • J.A. Chavez et al. “SPICE Model of Thermoelectric Elements Including Thermal Effects” IEEE, 2000. • Piotr Dziurdzia and Andrzej Kos. “Tool for Fast Modeling Active Heat Sink”, Seventeenth SEMI-THERM Symposium, 2001. • Piotr Dziurdzia and Andrzej Kos. “High Efficiency Active Cooling Systems”, Sixteenth SEMI-THERM Symposium, 2000.
Power modeling references • Brooks, et al. “Wattch: a framework for architectural-level power analysis and optimizations” Proceedings of the 27th International Symposium on Computer Architecture, June, 2000 • Brooks, D, et al. “New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors, IBM Journal of R&D, Vol 47, No. 5/6, 2003. • Gunther, et al. “Managing the Impact of Increasing Microprocessor Power Consumption,” Intel Technology Journal, Q1, 2001 • Ponomarev, et al. , “AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors"”, DATE'02, March 2002. • Ye, et al., “The Design and Use of SimplePower: A Cycle-Accurate Energy Estimation Tool,” DAC2000. • Dhodapkar, et al., “TEMPEST: A thermal enabled multi-model power/performance estimator,” In Proceedings of the Workshop on Power-Aware Computer Systems, 2000.
Thermal management references • “A thermal-aware superscalar microprocessor” Chee How Lim; Daasch, W.R.; Cai, G. Quality Electronic Design, 2002. Proceedings. International Symposium on , 2002 Page(s): 517 -522 • Kevin Skadron et al. “Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management” Proceedings of the Eighth International Symposium on High-Performance Computer Architecture, Feb. 2-6, 2002. • “Dynamic thermal management for high-performance microprocessors” Brooks, D.; Martonosi, M. High-Performance Computer Architecture, 2001. HPCA. The Seventh International Symposium on , 2001 Page(s): 171 -182
Clustering References • R.I. Bahar S. Manne, “Power and Energy Reduction Via Pipeline Balancing” in Proceedings. 28th Annual International Symposium on Computer Architecture, 2001 • A. Baniasadi, and A. Moshovos, “Instruction Distribution Heuristics for Quad-Cluster, Dynamically-Scheduled, Superscalar Processors”, Proc. 33rd. Int’l. Symp. on Microarchitecture (MICRO-33) • R. Canal, J.M. Parcerisa, A. Gonzalez. “A Cost-Effective Clustered Architecture”. In Proc. of the Int. Conf. on Parallel Architectures and Compilation Techniques, 1999 • R. Canal, J.M. Parcerisa, A. González “Dynamic Cluster Assignment Mechanisms” in Proc. of the Sixth International Symposium on High-Performance Computer Architecture, 2000. HPCA-6) • P. Chaparro, J. González, A. González “Thermal-Effective Clustered Microarchitectures” First Workshop on Thermal Aware Computer Systems (TACS-2004), 2004 • K.I. Farkas, P. Chow, N.P. Jouppi, Z. Vranesic, “The Multicluster Architecture: Reducing Cycle Time Through Partitioning”, in Proc. of the 30th. Ann. Symp. on Microarchitecture, December 1997, pp149-159
Clustering References • J. González, A. González “Dynamic Cluster Resizing” Computer Design, 2003. Proceedings. 21st International Conference on , ICCD 03 • J. González, F. Latorre, A. González “Cache Organizations for Clustered Microarchitectures” 3rd Workshop on Memory Performance Issues (WMPI-2004), 2004 • S. Heo, K. Barr, K. Asanovic “Reducing Power Density Through Activity Migration” Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003 (ISLPED '03) • G.A. Kemp, M. Franklin, “PEWs: A Decentralized Dynamic Scheduler for ILP Processing”, in Proc. of the Int. Conf. on Parallel Processing. 1996, v.1, pp 239-246 • S. Palacharla, N.P. Jouppi, and J.E. Smith, “Complexity-Effective Superscalar Processors”, in Proc of the 24th. Int. Symp. on Comp. Architecture, 1997, pp 1-13 • J.M. Parcerisa, A. González, J.E. Smith, “A Clustered Front-End for Superscalar Processors “ Technical Report UPC-DAC-2002-29, 2002 • J.M. Parcerisa, J. Sahuquillo, A. González, J. Duato “Efficient Interconnects for Clustered Microarchitectures”, Proc. of the International Conference on Parallel Architectures and Compilation Techniques, 2002.
Clustering References • S.S. Sastry, S. Palacharla, J.E. Smith, “Exploiting Idle Floating-Point Resources For Integer Execution”, in Proc. of the Int .Conf. on Programming Lang. Design and Implementation. Montreal, 1998. • V.V. Zyuban, Kogge, P. M. “Inherently Lower-Power High-Performance Superscalar Architectures”, IEEE Transactions on Computers 2001
Power Distribution References • D.J. Herrell and B. Beker. “Modeling of power distribution systems for high-performance microprocessors,” IEEE Transactions on Advanced Packaging, vol. 22, no. 3, pp. 240-248, Aug. 1999. • M.D. Pant, P. Pant, D.S. Wills, V. Tiwari. “Inductive Noise reduction at the architectural level,” Proceedings of the 13th Int'l Conference on VLSI Design, Jan. 2000. • E. Grochowski, D. Ayers, and V. Tiwari. “Microarchitectural simulation and control of di/dt-induced power supply voltage variation,” HPCA8, Feb. 2002. • R. Joseph, D. Brooks, M. Martonosi. “Control techniques to EliminateVoltage Emergencies in High Performance Processors,” HPCA9, Feb. 2003. • M. Powell and T. N. Vijaykumar, “Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage”, ISCA30, June 2003 • R. Joseph, Z. Hu, and M. Martonosi, "Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization" HPCA, February 2004. • M. Powell and T. N. Vijaykumar. “Exploiting Resonant Behavior to Reduce Inductive Noise,” ISCA2004. • K. Hazelwood and D. Brooks. “Eliminating Voltage Emergencies via Microarchitectural Voltage Control Feedback and Dynamic Optimization ,” ISLPED2004.