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Advanced Power Supply Control & Upgrade | Pohang Accelerator Lab

Explore EPICS collaboration meeting highlights on power supply control, digital upgrades, and future plans at the Pohang Accelerator Laboratory. Learn about status updates, hardware reviews, and fast control system requirements.

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Advanced Power Supply Control & Upgrade | Pohang Accelerator Lab

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  1. Pohang Accelerator Laboratory POSTECH PLS Power Supply control and upgrade plan EPICS collaboration meeting 2004Dec8 - 10 , 2004 RICOTTI, Tokai, JAPAN Pohang Accelerator Laboratory Kiman Ha, M.Y.Oh, J.H Kim, J.M Kim and J.H Choi hkm@postech.ac.kr EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  2. Pohang Accelerator Laboratory POSTECH Outline -Status of orbit feedback -Present status of power supply control -Digital power supply upgrade plan -Hardware review and test result -Summary EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  3. Pohang Accelerator Laboratory POSTECH Orbit feedback status • Orbit feedback operation started for user service in November -Orbit stability with feedback(RMS) - short term (1 hour) : < 1 m - long term (12 hours) : < 3 m • Both V and H corrector PS’s are involved for feedback EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  4. Pohang Accelerator Laboratory POSTECH Present PS upgrade status • Upgrade status • .Kept vertical Orbit Stability less then 3 m by feedback operation • .Replaced 22 sets of Corrector PS and their Control system in September • -EPICS Control and embedded controller • .Collaboration with BESSY-II (Ralph, Ingo) and Kristi(SLAC) • .Same as BESSY-II, 24Bit DAC Controller • .CANbus field bus with EPICS IOC • .Event System for PS time synchronization EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  5. Pohang Accelerator Laboratory POSTECH Next plan of power supply upgrade • -Requirements of corrector PS • .Fast Corrector control system(>1kHz) • .Vertical PS need 20bit of step resolution • .Horizontal PS need 16bit step resolution • 2005, will replace all vertical PS • . 2ppm step resolution • . +/-10ppm long term stability • -Feed-forward for ID gap changed • .Install steering magnet • .+/-5A 16bit 1kHz bandwidth PS EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  6. Pohang Accelerator Laboratory POSTECH Fast Control System requirement -PS : >1kHz BW, > 18bit output resolution - 1 to 5kHz set point -Event system synchronization >BPM measurement >PS control trigger -Fast beam position and feedback algorithm processing EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  7. Pohang Accelerator Laboratory POSTECH Background of Digital PS development -Implementation of modern power converter technology .Resent DSP&FPGA show very powerful performance -Requirements of beam physicists for orbit stabilization .Slow, fast, and epics based robust control system -High speed control applications: >4kHz -High output resolutions: >18bit -Low cost and small number of hardware components .Reduce error source .Easy maintenance EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  8. Pohang Accelerator Laboratory POSTECH Digital Controller Advantage -Modern digital technology(DSP, FPGA,ADC) -Cost effective and precise power supply -High flexibility and modularity -High functionality -Built in all functions for PS .Current regulator(PI, feed forwarder) .Direct PWM generation .Fast control port .Analog, Digital I/O EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  9. Pohang Accelerator Laboratory POSTECH Digital Control Unit DSP-controllerincl. FPGA 16 Bit Digital Out 8 bit Digital Input 1 RS232 1 Fiber optics Analog- Digital- Converter 8 Analog Input 2 Analog Output EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  10. Pohang Accelerator Laboratory POSTECH Flags, IRQs, Reset 5 V Block diagram of Controller Card without software functions SHARC DSP ADSP-21065L other DSP Controller Cards SPORT 1 (serial port) ADC/DAC Card SPORT 0 (serial port) Reset Security controller (Watchdog) Trigger /Reset /Interrupt Power Monitor SRAM 2MBit BUS SoC / SPARE / ADC clock (200 kHz) PWM generator FLASH EPROM 8 MBit PWM synchronisation CLOCK 60/30/20MHz Analog Sig. Power Inverter Section Analog & Digital Signal Feedback PWM optic PWM signal D SUB 15 FPGA digital Input / Output EPROM FPGA Service PC JTAG IO- controller RS 232 DC DC 24 V Control System (EPICS) Control-IO serial link Backplane fast optical input for Trigger /Reset /Interrupt Timer From PSI Lukas optic EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  11. Pohang Accelerator Laboratory POSTECH Prototype of Digital PS for PLS Power Stack Filter IGBT driver .+/-100A .DC 30V ADC DSP DCCT RS232 Optical fiber for EPICS interface EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  12. Pohang Accelerator Laboratory POSTECH IOC control test Test panel IOC VIPC664 TM Digital PS Fiber optics EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  13. Pohang Accelerator Laboratory POSTECH IOC and PS configuration Event trigger Carrier module TM module EVR CH1 PS 1 PS IP-A CH2 PS 2 VME CPU IP-B IP-C MVME5110 PS 8 PS IP-D Optical fiber link VIPC664-TM EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  14. Pohang Accelerator Laboratory POSTECH Control hardware components IP2 TM VIPC664-TM EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  15. Pohang Accelerator Laboratory POSTECH Step response test 55.0005 55.0004 +55.0003 55.0002 55.0001 55.0A 55.0A 1ppm @ full range V*10 is Amps Step response @55(A), 100uA step(1ppm) EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  16. Pohang Accelerator Laboratory POSTECH Summary -The PLS orbit feedback operation is based on EPICS control system. -CANbus IOC and control are working well without any problem -Satisfactory result of prototype Digital controlled PS -Next Digital PS will be operated for orbit feedback -This high performance PS technology will be helpful for our new project, 4th generation PAL-XFEL EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

  17. Pohang Accelerator Laboratory POSTECH Overview PLS(Pohang Light Source) has successfully upgraded storage ring straight section 20bit power supplies and control system for global orbit feedback operation in collaboration with BESY-II. Now we are looking for EPICS based fast control system and cost effective precise digital controlled power supply in collaboration with PSI and DIAMOND. I will present the current status of PLS global orbit feedback system, and experimental results of 1ppm resolution digital controlled power supply for the next upgrade of PLS. EPICS Collaboration Meeting 2004 @ RICOTTI, Tokai, JAPAN

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