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3C Technology and Life - Cellular Phone Contents

3C Technology and Life - Cellular Phone Contents. Professor : 許 恒 銘 Rm. 705 , EE Building / Professor : Heng-Ming Hsu Department of Electrical Engineering NCHU. 1946 年，貝爾實驗室 - 蜂巢行動電話 (Cellular mobile phone) ，簡稱為 Cell-phone. 1973 年，摩托羅拉 - 兩塊磚頭大的無線電話撥打 , 代表著手機時代即將來臨的第一通電話.

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3C Technology and Life - Cellular Phone Contents

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  1. 3C Technology and Life - Cellular Phone Contents Professor : 許 恒 銘 Rm.705, EE Building / Professor : Heng-Ming Hsu Department of Electrical Engineering NCHU

  2. 1946年，貝爾實驗室-蜂巢行動電話 (Cellular mobile phone)，簡稱為Cell-phone. 1973年，摩托羅拉-兩塊磚頭大的無線電話撥打,代表著手機時代即將來臨的第一通電話 . Cellular - Phone History 3G: (Qual Com) 高通 CDMA2000，WCDMA，TD-SCDMA，三種通訊協定，在頻寬利用和數據通信方面都有進一步發展 ,分別支援2 Mbps、 384 Kbps以及144 Kbps等不同的傳輸速度 4G: LTE (Long Term Evolution)目前在市場上備受矚目的新一代行動無線寬頻技術，LTE估計最高下載速率100Mbps與上傳50Mbps以上 2G: 適應數位通訊的需要--增加數據、傳真、簡訊等非語音的數位訊號傳輸--每秒9.6～ 14.4 Kbps，速度太慢 1G: 上市是於1985年上市，重達3公斤

  3. LTE Current Status • LTE採用2x2配置作為MIMO的基本配置，即基站（Base Station）和終端（End Users）各兩根天線，未來會考慮4x4配置。 • 在每一個 5MHz 的蜂窩（cell）內，至少能容納200個動態使用者（active user）。 • 支援Multicast Broadcast Single Frequency Network • 用戶面單向傳輸時延低於5ms，控制面從睡眠狀態到激活狀態遷移時間低於50ms。 • 在20MHz頻譜頻寬能夠提供下行100Mbps、上行50Mbps的峰值速率。 LTE商用服務的國家截至2012年1月，全球共有285個營運商正在93個國家中投資LTE。 Taiwan devoted in WiMax, now it needs change to LTE.

  4. LTE Technical Milestone • 2006年7月，NTT DoCoMo和NEC、富士通等設備夥伴開始研發LTE。 • 2007年11月，3GPP工作組會議通過LTE TDD融合技術提案。 • 2008年2月20日，NTT DoCoMo選擇Ericsson參加LTE基站開發項目。 • 2008年4月，Motorola展示首位 EV-DO 到 LTE - 影像流從 LTE 到商業 EV-DO 網路，並回到 LTE。 • 2008年4月，LG電子 和 Nortel Networks (北電網路)展示在110KM時速狀態下移動時,使用LTE可以達到50Mbit/s的傳輸速度.

  5. 蜂巢式行動電話通訊系統 蜂巢理論模型 基地台涵蓋範圍示意圖

  6. Wireless communication Evolution Ref. 2002 IEDM RF Short Course

  7. Multi-Chip Module Flash Base Band RF Front End Power Amplifier Transceiver Architecture More than one IC’s were implemented into wireless products.

  8. One Single Chip Bus Baseband PA RF Benefits of System-on-Chip ☺ Size ☺ Cost (Package,Die,..) ☺ Power consumption ☺ Customer orientation Module ☺ Time to market

  9. Near Field of Antenna

  10. VDD Gate • N+ • Drain • N+ • Source • P-well • Bulk IC technologies – 0.25um, 0.18um, 0.13um, 90nm,65nm,45nm Cross-sections of MOS (metal-oxide-semiconductor) transistor

  11. Technology Scaling Rule

  12. Wafer size – 6’’, 8’’, 12’’

  13. System IC Business Diagram • System IC is driving the whole semiconductor industry !

  14. Building Block of Memory ICs • High Capacitance / Low Leakage Current. • High Packing Density / Low Process Cost.

  15. Building Block of Logic ICs • Fast Switching. • High Current Drivability.

  16. Interconnection • Why Multilevel Interconnect ? • To allow tighter packing of devices on a chip • improve interconnect limited device packing • To reduce chip size and/or increase functions of a chip • To minimize unnecessarily long interconnect route • speed up signal delay • Multilevel interconnect with interlevel planarization !

  17. Impact of Interconnect Delay • Interconnect will be dominant in signal delay • Cu/Low-k retards the trend ~2 generations

  18. Technology Roadmap • Scaling continues for better performances !

  19. Conclusions • Frequencies & data rates will be continuous to increase • All device functions will be merged into one single chip. • IC is a promising & competitive area for production innovation.

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