1 / 26

Structural Modeling in VHDL

9/2/2012. 55:032 - Introduction to Digital Design. Page 2. Overview. Component and signal declarationsComponent instantiationsHierarchical structuresPackagesName spaces and scope. 9/2/2012. 55:032 - Introduction to Digital Design. Page 3. Schematic Vs. VHDL. Structural VHDL models the structure

merritt
Download Presentation

Structural Modeling in VHDL

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

    1. 9/2/2012 55:032 - Introduction to Digital Design Page 1 Structural Modeling in VHDL

    2. 9/2/2012 55:032 - Introduction to Digital Design Page 2 Overview Component and signal declarations Component instantiations Hierarchical structures Packages Name spaces and scope

    3. 9/2/2012 55:032 - Introduction to Digital Design Page 3 Schematic Vs. VHDL Structural VHDL models the structure of a circuit; similar to circuit schematic Defines the circuit components Describes how components are connected System behavior or functionality is indirectly defined; model only lets components work in a certain, defined way. Symbolic analysis allows us to determine functionality of system from understanding component behaviors

    4. 9/2/2012 55:032 - Introduction to Digital Design Page 4 Example Schematic

More Related