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ME4447/6405. Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics Instructor: Professor Charles Ume Lecture #9. Assembly Language. Reading assignments for the next 4 weeks: HCS12 Microcontroller: S12CPUV2 Reference Manual CPU12RG/D: Rev. 2, 11/2001
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ME4447/6405 Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics Instructor: Professor Charles Ume Lecture #9
Reading assignments for the next 4 weeks: HCS12 Microcontroller: S12CPUV2 Reference Manual CPU12RG/D: Rev. 2, 11/2001 Reference Book: Basic Microprocessors and the 6800, by Ron Bishop . Chapter 5 Microcomputers-What Are They? Chapter 6 Programming Concepts Chapter 7 Addressing Modes Chapter 8 M6800 Software There will be questions and answers the rest of this week and next week based on your reading assignment. Reading Assignments
HCS12 CPU can only understand instructions written in binary called Machine Language. Writing programs in Machine Language is extremely difficult Mnemonics are simple codes, usually alphabetic, that are representatives of instructions they represent (example: LDAA [LoaDAccumulator A]) A program written using Mnemonic Instructions is called Assembly Language program An Assembler can be used to translate Assembly Language program to Machine Language Program, and put it in S-Record Format. Why use Assembly Language?
Address: Common term for memory location. Always written in hexadecimal. $4000 is the 4000th16 Memory Location (Note: “$” signifies hexadecimal) LDAB $4000 Literal Value: A number used as data in program is indicated by “#”. Can be represented in the following ways: #$FF = hexadecimal number FF #%1011 = binary number 1011 (Note: “%” signifies binary) #123 = decimal number 123 LDAB #$FF; LDAB #$D01A A Literal Value can be stored in an address Example: Store Literal Value #$FF in address $4000 LDAB #$FF STAB $4000 Example 2: Store Literal Value #$FE0A in address $2000 LDD #$FE0A STD $2000 Note: #$FE is stored in address $2000 and #$0A is stored in address $2001 Assembly Language Notations
Directives: Instructions from the programmer to Assembler NOT to microcontroller (Page 134 in Ron Bishop) Example 1: ORG <address> Store translated/assembled machine language instructions in sequence starting at given address for any mnemonic instructions that follow ORG $1000 Example 2: END Stop translating/assembling mnemonics instructions until another ORG is encountered (Note: More will be covered in later lectures) Assembly Language Directives
Assembly Language Format (Note: Last three options are called Operands) Data that the Assembly Directive uses Or Blank if Mnemonic Instruction does not need Data Or Offset Address used to modify Program Counter by a Mnemonic Instruction Or Data that Mnemonic Instruction uses Or Address where the Data that Mnemonic Instruction will use is stored A Tab (8 white spaces) or Label (Note: A Label is another Assembly Directive and will be covered in later lectures) Assembly Directive Or Mnemonic Instruction Left margin of assembly program
ORG $0800 LDAA #$100A 86 100A - - - - - - - - DECA 43 BNE Front 27 0E LDAB $2F,Y - - STAB $110C - - - - - - Front INCX - - - - - - SWI 3F END
In the previous slide, there were several options for the operand: Blank if Mnemonic Instruction does not need Data Offset Address used to modify Program Counter by a Mnemonic Instruction Data that Mnemonic instruction uses Address were Data that Mnemonic instruction uses is stored Which option a programmer uses is defined by the following addressing modes: (See next slide also) Addressing Modes • Inherent • Immediate • Extended • Indexed Indirect • Direct • Indexed • Relative (Note: All instructions are not capable of all addressing modes. Example: BLE [Branch if Less than or Equal to Zero] is only capable of Relative addressing mode)
Example: Write a program to clear accumulator A. Start programming at address $1000 Solution: ORG $1000 CLRA SWI END CLRA [ CLeaR accumulator A] is an instruction using Inherent Addressing (NOTE: SWI [SoftWare Interrupt] is a mnemonic instruction which tells the 9SC32 to store the content of cpu registers on the stack. Sets the I bit (the interrupt bit) on the CCR. Loads the program counter with the address stored in the SWI interrupt vector, and resumes program execution at this location. If no address is stored in the SWI vector, the main program will stop execution at this point. Used in this course to return control to Mon12 Program) Blank if Mnemonic Instruction does not need Data If Mnemonic Instruction does not need data then it uses Inherent Addressing Mode
Example: Write a program to load accumulator A with #$12. Start programming at address $1000 Solution: ORG $1000 LDAA #$12 LDAA #$5BEE (Explain what happens) SWI END LDAA is an instruction using Immediate Addressing mode in this example Data that Mnemonic instruction uses The Mnemonic instruction is using Immediate Addressing mode if the operand is Data used by the instruction
Address were Data that Mnemonic instruction uses is stored The following addressing modes apply if the operand is an Address containing Data used by Mnemonic instruction : • Direct • Data is contained in Memory locations $00 to $FF • Address is given as a single byte address between $00 to $FF • Instructions using Direct addressing has fastest access to memory • Example: LDAA $00 • Loads accumulator A with Data value stored at memory location $00 • Extended • Data is contained in Memory locations $0100 to $FFFF • Address is given as a two byte address between $0100 to $FFFF • Example: LDAA $2000 • Loads accumulator A with Data value stored at memory location $2000
Example : Write a program to add the numbers 1010 and 1110. Solution ORG $1000 LDAA #$0A *Puts number $0A in acc. A LDAB #$0B *Puts number $0B in acc. B ABA *Adds acc. B to acc. A STAA $00 *Stores results in address $00 SWI *Software interrupt END LDAB and LDAA use immediate addressing mode STAA uses direct addressing mode Example Problem 1
Address were Data that Mnemonic instruction uses is stored (Continued) • Indexed: • Data is located within Memory locations $00 to $FFFF • Example: Store content of $2003 in Register A • LDX #$2000 • LDAA $03,X • Loads accumulator A with Data value stored at memory location $2003 • X + $03 = $2000 + $03 = $2003 • (Note: LDX [ LoaD index register X])
Why is Indexed Addressing Mode needed? Example: Store Data Value #$20 into memory locations $2000 to $3000 Without Indexed Addressing Mode With Indexed Addressing Mode • ORG $1000 • LDAA #$20 • LDX #$2000 • LOOP STAA $00,X • INX • CPX #$3001 • BNE LOOP • SWI • END ORG $1000 LDAA #$20 STAA $2000 STAA $2001 . . . STAA $3000 SWI END Program on the Left is much longer than the program on Right
Why is Indexed Addressing Mode needed? (Continued) • ORG $1000 • LDAA #$20 • LDX #$2000 • LOOP STAA $00,X • INX • CPX #$3001 • BNE LOOP • SWI • END Note: LDAA[LoaD accumulator A] LDX [ LoaDIndex RegisterX] STAA [ STore Accumulator A] INX [ INcrement X] CPX [ ComPare X] BNE [Branch if Not Equal]( is using relative addressing in conjunction with label “LOOP”) LOOP, BNE LOOP, INX, and CPX #$3001 creates a loop. Loop1: Data in accumulator A (#$20) is stored at $2000 + $00 Data in X is incremented #$2000 + #$0001 = #$2001 Data in X is compared to #$3001 Not equal so do another loop Loop2: Data in Accumulator A (#$20) is stored at $2001 Data in X is incremented #$2001 + #$0001 = #$2002 Data in X is compared to #$3001 Not equal so do another loop Etc…..
ORG $1000 LDY #$1001 LDAA #$20 LDX #$2000 LOOP STAA $00,X INX DECY BNE LOOP SWI END Why is Indexed Addressing Mode needed? Example: Store Data Value #$20 into memory locations $2000 to $3000
Homework Homework 1 Write an assembly language program to clear the internal RAM in the MC9S12C32. Write a program to add even/odd numbers located in addresses $0800 through $0900. Homework 2 Write a program to find the largest signed number in a list of numbers stored in address $0A00 through $0BFF. Repeat for an unsigned number.
Types of Indexed modes of Addressing • Auto Pre-/Post-Increment/Decrement: • Base index register (X, Y and SP) may be automatically incremented/decremented before or after instruction • Program Counter may not be used as base register • No offset is available • May be incremented/decremented 1 to 8 times • Post-Increment (in ranges from 1 through 8): • LDX 2,SP+ EE B1 *Index register X is loaded with contents of memory location in stack pointer (same as PULX). • Then stack pointer is incremented twice.
Types of Indexed modes of Addressing • Pre-Increment (in ranges from 1 through 8): • LDX 2,+SP EE A1 *Stack pointer is incremented twice. • Then Index register X is loaded with contents of memory location in stack pointer • Pre-Decrement (in ranges from -8 through -1): • STAA 1,-X 6A 2F *Index register X is decremented. Then content of Accumulator A is stored in memory location in Index Register X
Types of Indexed modes of Addressing • Learning Objectives: • Learn how to use following in index mode of addressing instructions: • 5-bit signed constant offset: -16 to +15 • 9-bit signed constant offset: -256 to +255 • 16-bit signed constant offset: -32768 to +32767 • Accumulator offset • 16-bit constant indirect indexed • Learn how to use following base index registers for instructions: • X, Y, SP and PC • Note that when: • Offsetis added to base index register to form effective address. • Content of base register remains unchanged.
Types of Indexed modes of Addressing 5-Bit Constant Offset Indexed Addressing: -16 to +15 • Index mode uses: • 5-bit signed constant offset is added to base index register (X, Y, SP or PC) • To form effective address of memory location that will be affected by instruction. • Offset ranges from -16 through +15. • Majority of indexed instructions in real programming use offsets that fit in shortest 5-bit form of indexed addressing. • LDAA $00, X A6 00 *load A with (X + $00)
The following three statements are equivalent:STAA -8,X 6A 18 *Offset given in decimal STAA -$08,X 6A 18 *Offset given in hex STAA $FFF8,X 6A 18 *Offset given as 16-bit numberLet X contain #$3000. After program executed, content of A will be stored at address (#$3000 - #$08) = $2FF8$FFF8 = 1111 1111 1111 1000 0000 0000 0000 0111 1--------------------------------------------- - 0000 0000 0000 1000 = - #$0008
5-bit Constant offset : -16 to +15 LDDA -16, X A6 10: -16 = -$10 $10 = 00010000 1’s Comp = 11101111 2’s Comp = 11110000 rr0nnnnn = 00010000 = $10 (this is the postbyte) bits 0-4 of offset LDAA 6, SP A6 86: 6 = $06 = 00000110 rr0nnnnnn = 10000110 = $86 (this is the postbyte) bits 0-4 of offset LDAA –14, SP A6 92 -14 = -$0E 0E = 00001110 1’s Comp = 11110001 2’s Comp = 11110010 rr0nnnnn: 10010010 = $92 (this is the postbyte) bits 0-4 of offset
Types of Indexed modes of Addressing • 9-Bit Constant Offset Indexed Addressing: -256 through +255 • Uses 9-bit signed constant offset which is added to base index register (X, Y, SP or PC): • To form effective address of memory location affected by instruction • Offset ranges from -256 through +255. • Content of base register is not changed after instruction is executed • MSB (sign bit) of offset is included in instruction postbyte • Remaining 8 bits are provided as extension byte after instruction postbyte in instruction flow. • LDAA $FF, X *Assume X contains $1000 prior to instruct is executed • A6 E0 FF • LDAB -20, Y *Assume Y contains $2000 prior to instruct is executed • E6 E9 EC • First instruction will load A with value from ($1000 + $FF) = $10FF • Second instruction will load B with value from ($2000 – 20) = $IFEC
(Page 21) 9-bit Constant offset : -256 to +255 Postbyte Code (xb) is = 111rr0zs Z = 0 and s = 1 (when offset is a negative number-MSB of offset) Z = 0 and s = 0 (when offset is a positive number-MSB of offset)
9-bit Constant offset : -256 to +255 LDAA -25, X A6 E1 E7: -25 = -$19 $19 = 00011001 1’s Comp = 11100110 2’s Comp = 11100111 = $E7 (this is the offset) 111rr0zs = 11100001 = E1 (this is the postbyte) LDAA 30, SP A6 F0 1E: 30 = $1E (this is the offset) = 00011110 111rr0zs = 11110000 = F0 (this is the postbyte)
(Page 21) Types of Indexed modes of Addressing 16-bit Constant offset : -32768 to +32767
16-bit Constant offset : -32768 to +32767 • Postbyte Code (xb) is = 111rr0zs • Z = 1 and s = 0 : For the case when the offset is positive or negative. • S is not = 1 during postbyte calculation when the offset is negative because • Bit 15 of the 2’s complement offset is already 1 which • Indicates a negative offset number • Postbyte for positive offset is same as postbyte for negative offset ie EA
16-bit Constant offset : -32768 to +32767 Postbyte code (xb) is 111rr0zs LDAA 280, y A6 EA 0118 280 = $0118 = 0000000100011000 (this is the offset) 111rr0zs = 11101010 = $EA (this is the postbyte) LDAA -280, Y A6 EA FE E8 -280 = -$0118 $0118 = 0000000100011000 1’s Comp. = 1111111011100111 2’s Comp. = 1111111011101000 = $FEE8 (this is the offset) 111rr0zs = 11101010 = $EA (this is the postbyte)
Accumulator Offset Indexed Addressing In this indexed addressing mode: Effective address is sum of values in base index register and unsigned offset in one of accumulators. Value in base index register is not changed. Base indexed register can be X, Y, SP or PC and accumulator can be either 8-bit (A or B) or 16-bit (D) Content of A, B, or D accumulator added to base index register to form address LDAA B, X A6 E5 Instruction adds content of accumulator B to X register to form address from which accumulator A will be loaded. B and X are not changed by this instruction. Types of Indexed modes of Addressing
(Page 21) • Detailed Explanation: • This is Indexed Addressing Mode with Accumulator Offset. • Opcode for LDAA is A6 for this mode. • From the table above, the formula for postbyte of this mode is: 111rr1aa • rr is 00 because Base Index Register is X • aa is 01 because Accumulator used for offset is B • 11100101 = E5 in hex Example: LDAA B, X Ans: A6 E5
Why is Pre-/Post-Increment/Decrement Useful? Example: Store Data Value #$20 into memory locations $2000 to $3000 Without Post-Increment With Post-Increment • ORG $1000 • LDAA #$20 • LDX #$2000 • LOOP STAA 1,X+ • CPX #$3001 • BNE LOOP • SWI • END • ORG $1000 • LDAA #$20 • LDX #$2000 • LOOP STAA $00,X • INX • CPX #$3001 • BNE LOOP • SWI • END Note: “1” refers to the number of post increments, not an offset! Program on the Left requires 1 more byte of program memory and takes 1 more cycle to execute per run through the loop than the program on the right. This may make a large difference when the program is large and complex or when dealing with values larger than 16-bits.