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RTSXS-U Rev.B Qualification

Briefing: Independent NASA Test of RTSX-SU FPGAs. RTSXS-U Rev.B Qualification. Rev B Poly-Resize Qualification Summary. Actel made Poly sizing adjustment on RTSX-SU. Purpose: To improve margin to –1 speed grade Low voltage transistor changes (both N & P) <10% To reduce tri-state leakage

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RTSXS-U Rev.B Qualification

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  1. Briefing: Independent NASA Test of RTSX-SU FPGAs RTSXS-U Rev.B Qualification

  2. Rev B Poly-ResizeQualification Summary • Actel made Poly sizing adjustment on RTSX-SU. • Purpose: • To improve margin to –1 speed grade • Low voltage transistor changes (both N & P) <10% • To reduce tri-state leakage • Output PMOS transistor increased by <20% • No e-test specification changes • No datasheet changes • No SMD specification change

  3. RevB Poly-ResizeQualification Summary • Qualification Test Requirement • Tests include Group A, Group C, ESD, and Characterization • Group C & ESD are done with RTSX32SU-CQ256B devices • RTSX32SU was the only available device when qual started • Effects of poly-resize change is independent of die size, so there was no need to use the largest device for qualification • Group A and Characterization done with both RTSX32SU-CQ256B and RTSX72SU-CQ256B devices • Wafer lots used for testing: • RTSX32SU is from wafer lot D19S61 • RTSX72SU is from wafer lot D1AYH1

  4. Rev.B Poly-ResizeQualification Summary • Group C (RTSX32SU) • Test Condition: 150oC for 184 hours per TM1005 • Sample Size: 1 wafer lot, 80 units (3 spare units) • Pass Criteria: 77(1) based on LTPD(5) • Result: Passed with 80(1) • 1 unit failed ATE at –55oC after 184 hours of Burnin • Unit passed Room temperature testing (functional and DC parametrics) prior to cold testing • High ICCA (~36.2mA) and high ISV (~68.9mA) measured • FA on going, estimated to be completed end of February • Possible cause EOS • ESD (RTSX32SU) • Test Condition: TM3015, Human Body Model • Sample Size: 1 lot, 3 units • Result: classified as class 1 ESD sensitivity (75V) • See ESD section for more details.

  5. Rev.B Poly-ResizeQualification Summary • Group A • Test Condition: 3-temp test (-55oC, +125oC, +25oC) per TM5005 • Sample Size: RTSX32SU, 1 lot, 116 units RTSX72SU, 1 lot, 116 units • Pass Criteria: 116(0) • Result: Both lots passed with 116(0) • Characterization (RTSX32SU & RTSX72SU) • Sample Size: 1 lot per die type, 15 units per lot • All units programmed to device characterization designs, with 5 units each programmed to 3.3V PCI, 5V TTL, and 5V CMOS IO standards • Test Condition: All units are tested at –55oC, -40oC, 0oC, +25oC, +85oC, and +125oC • Result: Device performance meet Timer requirement for standard & -1 speed

  6. Rev.B Poly-ResizeAdditional Data • LTOL (RTSX32SU) • Test Condition: -55oC for 500 hours • Sample Size: RTSX32SU-CQ256B, 1 lot with 6 units • Result: Passed with 6(0) for 500 hours • SSU Test (RTSX72SU & RTSX32SU) • Sample Size: 100 units per wafer lot • Test Condition: Burn In done at Room temperature for 168hrs • Result: Both Passed

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