FPGA Based Fuzzy Logic Controller for Semi-Active Suspensions

1. FPGA Based Fuzzy Logic Controller for Semi-Active Suspensions Aws Abu-Khudhair

2. Outline • Types of Suspension Systems • Project Objective ENGG 6530

3. DSP and Reconfigurable Computing Systems Aws Abu-Khudhair

4. Outline • What is DSP?... • Implementation of Various Algorithms… • Advantages of FPGA in DSP… • Tools available/Mapping DSP onto FPGA… ENGG 6530

5. Resources [1] “A Primer on FPGA-Based DSP Applications”, by Acromag Inc. [2] “Designing Digital Signal Processing with FPGAs”, by Allen Kinast [3] “FPGA Implementations of Fast Fourier Transforms for Real-Time Signal and Image Processing”, by I.S. Uzun, A. Amira and A. Bouridane [4] “Choosing the Right Architecture for Real-Time Signal Processing Designs”, by Leon Adams. [5] “Digital Signal Processors: Applications and Architectures”, by Kurt Keutzer ENGG 6530

6. What is DSP? • Concerned with the manipulation of signals for: • Filtering • Transformation • Decoding/Encoding etc. • Widely implemented in PDSP ENGG 6530

7. DSP Applications • Wireless Communication • Audio Applications • Image Processing/Medical Imaging • Networking • Weather forecasting ENGG 6530

8. Various Algorithms • Finite Impulse Response (FIR) filters • Fast Fourier Transforms (FFT) • Infinite Impulse Response (IIR) filters • Forward Error Correction (FEC) • Modulation/Demodulation ENGG 6530

9. DSP Implementation Comparison Most suitable technology?? ENGG 6530

10. PDSP vs. FPGA • PDSP • Specialized microprocessor based on the Von Neumann arch. • Programmed in C/assembly for performance • Suited for complex math-intensive tasks, with conditional processing. • Limited in performance by the clock rate and number of operations it can perform per clock cycle. • e.g. TMS320C6201 has 2 multipliers + 200MHz clock  400M multipliers/second ENGG 6530

11. PDSP vs. FPGA cont. • FPGA • Uncommitted gates • Programmed by HDL. • Performance limited by the number of gates and clock rate. • Suited for a wide range of applications ENGG 6530

12. Advantages/Disadvantages of FPGA • Advantages • Parallel Processing (Performance) • Flexible Architecture • Price • Power Demand compared to DSP • Disadvantages • Higher development cost and increased time to market than DSP • Implementation of conditional processing ENGG 6530

13. Reg Coefficient MAC unit Data Out Important Building Blocks • Add • Subtract • Multiply • Multiply and Add • Multiply and Accumulate (MAC) Unit ENGG 6530

14. 256 Tap FIR Filter Conventional DSP – Serial processing 256 Loops needed to process samples 1 FIR tap per DSP instruction cycle ENGG 6530

15. 256 Tap FIR Filter cont. FPGA – Parallel processing All 256 MAC operations in 1 clock cycle ENGG 6530

16. × × × × × × × D Q + + + + + + + + + + + + FPGA Design Flexibility Multiply and Add FPGA – Design Optimization Parallel Semi-Parallel Serial D Q Q = (A x B) + (C x D) + (E x F) + (G x H) Cost Speed ENGG 6530

17. Performance of PDSP VS. FPGA ENGG 6530

18. Advanced FPGA Architectures with DSP Resources ENGG 6530

19. DSP Design tools • C, C++ • MATLAB / Simulink • HDL (VHDL / Verilog) • Xilinx EDK/ISE ENGG 6530

20. MATLAB / Simulink ENGG 6530

21. Simulink ENGG 6530

22. Simulink + ISE ENGG 6530

23. Design flow with FPGA ENGG 6530

24. DSP Design Evolution from HW DSP to FPGA DSP solutions • Signal capture and sync. • Data exchange methodology • off-the shelf hardware • Logic Processing • Price/Feature • Data/Sample rates • Debugging • Use of IP cores • I/O interface • Development cycles • Deployment cost ENGG 6530

25. Conclusion • “The primary reason solutions were so expensive to design, slow to develop and prove, and difficult to re-deploy was that the solutions were fixed in hardware” [1] ENGG 6530

26. Questions? • Thank you ENGG 6530