WP-JP-S Electro/optic switching architectures First Review Meeting Brussels, 23-24 May 2007

1. WP-JP-S Electro/optic switching architecturesFirst Review MeetingBrussels, 23-24 May 2007 WP Leader: Alexandros Stavdas Speaker: Christina (Tanya) Politi University of Peloponnese

2. Overview • JP on Electro/optic switching architectures • Led by University of Peloponnese • Estimated 58 Person months effort • Starts on Month 2 • End on Month 24

3. Objectives • To assess the merit of all-optical, optoelectronic and electronic switching subsystems and technologies and the synergy between the different technologies for an overall cost-effective solution • Study hybrid electro-optical switching architectures. Where appropriate, the corresponding multi-layer node could be comprised by “optically transparent” and “opaque” layers • Technologies and sub-systems for low cost O-E conversion exploiting fixed-receiver-tunable-transmitter, fixed-transmitter-tunable-receiver schemes • Control complexity assessment of hybrid optoelectronic solutions and optical interconnect solutions • Migration scenarios from purely electronic switching to optoelectronic towards all-optical. • CAPEX/OPEX studies with emphasis given on power consumption considerations

4. Involved Partners • PoliTO • DEIS-UniBO • PoliMI • UoA • UoPelop • UniVi (collab. Inst.)

5. Advisory Board • Andrea Bianco (PoliTo) • Achille Pattavina (PoliMi) • Carla Raffaelli (DEIS) • Dimitris Syvridis (UoA)

6. Progress and status • JP-S kick-off initially met problems with respect to the assignment of chair-person and expected technical contributions • By the end of 2006 IRC finally withdrew from JP-S WP leadership as well as from the consortium • After a slow start good collaboration among the group of involved partners has been achieved and the WP resumed its activities with excellent performance • Intermmediate milestones and deliverables completed in time or even before deadline • Good synergy, significant amount of technical work and performance evaluation results

7. Milestones • M.JP-S.1 [T0+3]->[T0+9] Designation of the JP-S chairperson and of the participating institutions; draft of actions • M.JP-S.2 [T0+6]->[T0+10] First JP-S meeting; definition of the final list of JP-S actions • M.JP-S.3 [T0+16]->[T0+12] Second JP-S meeting; refinement of technical tasks, checklist on integration of activities, proposals for joint publications • M.JP-S.4 [T0+22] Editing of joint paper

8. Deliverables • D.JP-S.1 [T0+6] ->[T0+11] “Key issues for electro-optic switching architectures and final list of JP-S activities” (Finalization) • D.JP-S.2 [T0+13] Intermediate JP-S report on planned activities and first research results • D.JP-S.3 [T0+24] Final JP-S report: “Electro-Optic Switching Architectures”

9. Meetings and Workshops • 1st JPS Conference Call • Host: UoPelop • Location: Monday 4-Dec-06, 12:00 CET • Type: Finalisation of JPS list of actions, definition of DJPS.1 contents • 2nd JPS Meeting • Host: UPC • Time: Monday 26-Feb-07 14:30-18:00 • Location: Room C6-220 • Type: Review of JPS activities, plan for DJPS.2

10. Resources employed: Effort 56% Permanent staff (AC): 7 m/m

11. Resources employed: Budget 35%

12. JP-S Budget Allocation Criteria • Contributions to deliverables • Participation in meetings • Preparation of joint papers • The first two above are mandatory. • Initial estimation for the reserved WP budget based on the assumption of equal participation. • Partners have agreed to these rules. • In case the expected contributions are not received, adjustments to the budget allocation may be made

13. JP-S Organization • Vertical work organization focusing on the quantitative evaluation of the identified research topics • Collaboration sought to achieve unity of contributions • Main focus: evaluation of hybrid opto-electonic switch architectures • Photonic components as switch elements & fabrics • Migration scenarios from purely electronic switching to optoelectronic towards all-optical • Switch control complexity assessment vs. network performance (loss, delay, utilization)

14. Technical Overview • In WP7 of e-Photon/ONe, various all-optical and optoelectronic OPXCs have been proposed and studied in terms of physical and networking performance and a possible migration scenario from simple/low functionality nodes to high functionality ones has been proposed • Despite these advances, it became evident that either some migration steps from a purely electronic world to an all-optical one are still missing, and that all-optical technology is not mature yet, leading to performance degradation (physical and networking) and/or high cost.

15. Two paths… • Packet is the new transport and switching granularity. Might be more than one (network layer) packet size (i.e. L2 frames or bursts) • One approach aiming to explore the IP-router legacy. Optics to merely replace parts of electronic router circuitry. • The other approach is exploring the telecom legacy. Integration of transmission and switching for efficient transportation with network wide (end-to-end) control protocols

16. Role & Contribution of Partners (1) • UoP • Network and hybrid node architectures for efficient traffic control • Y1: Performance of a Hybrid T-S 1:N shared node in isolation • DEIS-UNIBO • Hybrid node architectures for increased network performance • Y1: Evaluation of alternative full 3r T-W-S switch node architectures • POLITO • Evaluation of optical switching fabric architectures • Y1: Synchronous vs. asynchronous operation

17. Role & Contribution of Partners (2) • POLIMI • Evaluation of optical switching fabric architectures • Y1: Evaluation of optical switching fabric architectures • UVI • Evaluation of efficient switch scheduling implementations • Y1: Decoupled iSLIP: D-iSLIP • UoA • Optimized (electrical power consumption & cost effectiveness) switching techniques • Y1: Performance evaluation of switching components based on MR resonators

18. Core switching nodes: 2 directions • Full O-E conversion in every node including 3R regeneration and buffering capability of the entire incoming traffic. • Hybrid node. Only a fraction of the incoming traffic is O-E converted and possibly buffered. Also a transparent L2 electronic switch can be deployed. • The two approaches leading to networks with entirely different performance characteristics

19. Queue Manager Scheduler 1 NxM VOQ l1 Queue Manager Scheduler Rx Tx Tx Rx lM Full 3R: T-S configuration Drop/Transit OXC O/E - 3R buffering outbound Class-O

20. Drop/Transit OXC O/E - 3R buffering Wavelength conversion outbound Full 3R: T-S-W configuration Class-IIA Class-IIB Partial Class-I

21. Queue Manager Scheduler Rx Tx Queue Manager Scheduler TTx Rx M x M AWG router lk An O/E subsystem: The T-W Module

22. Hybrid: T-S Drop/Transit OXC 3R buffer Transparent Electr. switch outbound O/E + L2 switch

23. Hybrid: T-S 1+1 configuration (N+1):1 1:(N+1) 3R + buf. 3R +buf. L2 transparent Slot DXC 3R + buf. 3R +buf. 3R + buf. 3R +buf. • For every incoming fiber, there is a dedicated drop port at the input • However, only K out of M wavelengths can be 3R • Equally, the transparent electronic switch handle only a fraction of the incoming capacity outbound

24. Research Considerations • Adopting either the “telecom” or the “router” approach leading to networks with entirely different properties • Equally, the different node configurations are closely related to the underneath network type. • Example: Physical layer performance. With full O-E regeneration, a large number of nodes can be cascaded. Cost + power consumption is an issue

25. UoP

26. First year objectives • Architectures providing a near optimal trade-off between • Dynamic resource allocation • Efficient bandwidth utilization • Switch implementation complexity and cost • Latency & application level performance • Controlling loss and latency in dynamically reconfigurable architectures is a requirement towards efficient network resource utilization

27. D.E.I.S

28. l1  module 0 0 lM Bit-Synchronisation and buffering card Bit-Synchronisation and buffering card Bit-Synchronisation and buffering card Bit-Synchronisation and buffering card N:1 N:1 1:N 1:N N-1 l1 N-1 1:N EDFA TWC ON/OFF gating 1:N coupler lM Alternative Full 3R T-W-S

29. Scope • Set up a simulation tool to evaluate performance in the presence of electronic buffers • Synchronous • Packet loss • Queueing policies • Service differentiation • Evaluation of joint exploitation of different contention resolution domains • Time, wavelength, space

30. Poli. Mi

31. POLIMI proposal • PoliMI will be focusing on the following issues: • Realization of the M-to-K wavelength selector (O-E converting stage) by different “mixing” of electronic and all-optical sub-stages • Loss-behaviour comparison of the different O-E converting stage implementations • Optical-switching fabric: investigation of AWG-based alternatives to replace the B&S Class-O block

32. Poli. To

33. Framework of the planned work • Focus on optical switching fabric • Asynchronous architectures • Variable length packets • Asynchronous arrivals • No packet or slot alignment needed • Buffering • No buffering • Electronics buffering at inputs • Performance analysis • Throughput saturation model and simulation • IQ switch with large number of ports • Infinite queue size • Throughput vs packet lenght distribution (coefficient of variation) • CV=0 behaves as synchronous switching (58% throughput) • When CV=1 and no buffer available, 50% throughput instead of 63%

34. UVI

35. Electro-Optical Architecture • EOXC electronic sub-system design limitations: • Hardware decoupling is beneficial for practical implementations • Highly demanding performance requirements

36. Not feasible Which Scheduler? • Maximal Size Matching: Parallel Hierarchical Matching (PHM): • Delay: Low delay. • Stability: Uniform and i.i.d. traffic.  Scalability: O(N2) on-line complexity. • Number of iterations: O(log2N). • Load Balanced Birkhoff-von Neumann:  Scalability: O(1) on-line complexity.  Number of iterations: O(1).  Stability: 100% under weakly mixing traffic.  Delay: High delay. Decoupling PHM: • Trade-off between LB-BvN and PHM properties.

37. UoA

38. Optimizied switching components • MR resonators as photonic switching components • Performance and power consumption trade-offs

39. Scientific and Technical Impact • Organizing and hosting the International Conference “Photonics in Switching 2006”, held in Crete October 16-18th, 2006. Strong presence of e-photon/ONe • JP-S has already produced a number of papers published in conferences and journals • 5 joint papers published • 7 single papers published

40. Joint Papers • C. Raffaelli (DEIS-UNIBO), M. Savi (DEIS-UNIBO), A. Stavdas (UoPelop), Sharing Wavelength Converters in Multistage Optical Packet Switches, Proceedings HPSR 2006, Poznan (Polanda), June 2006. • D. Careglio, G. Muretto, C. Raffaelli(DEIS-UNIBO), J. Sole-Pareta (UPC), E. Vignes, Quality of service in a Multi-Fiber Optical Packet Switch, Photonics in Switching 2006, Greece, October 2006. • C. Raffaelli (DEIS-UNIBO), M. Savi (DEIS-UNIBO), A. Stavdas (UoPelop), Performance of Scheduling Algorithms in Multi-stage Optical Packet Switches with Sparse Wavelength Converters, Proceedings of IEEE GLOBECOM 2006, San Francisco, U.S.A., November 2006. • R. Zanzottera (POLIMI), C. Matrakidis (UoPelop), A. Stavdas (UoPelop), S. Sygletos, A. Pattavina (POLIMI), Design of OXC architectures based on arrayed waveguide gratings: topological properties and physical performance, IEEE Conferecne on High Performance Switching and Routing, pp. 257-263, Poznan, June 2006. • C. Raffaelli (DEIS-UNIBO), M. Savi (DEIS-UNIBO), N. Akar (BILKENT), E. Karasan (BILKENT), Packet Loss Analysis of Synchronous Buffer-less Optical Switch with Shared limited Range Wavelength Converters, Workshop on High Performance Switching and Routing (HPSR2007), May 2007.

41. Single Papers • C. Raffaelli (DEIS-UNIBO), M. Savi (DEIS-UNIBO), Performance Modelling of Synchronous Buffer-less Optical Packet Switch with Partial Wavelength Conversion, Proceedings of ICC 2006, Istanbul, Turkey, June 2006. • C. Politi (UoPelop), C. Matrakidis (UoPelop), A. Stavdas (UoPelop), Optical wavelength and waveband converters, 8th International Conference on Transparent Optical Networks, Vol. 1, pp. 179, June 2006. • G. Muretto (DEIS-UNIBO), C. Raffaelli (DEIS-UNIBO), Combining Contention Resolution Schemes in WDM Optical Packet Switches with Multi-Fiber Interfaces, Journal of Optical Networking, Vol. 6, No. 1, pp. 74-89, USA, January 2007. • C. Raffaelli (DEIS-UNIBO), M. Savi (DEIS-UNIBO), Traffic performance of Buffered Multi-Stage Optical Packet Switch, Proceedings of Photonics in Switching 2006, Crete, Greece, October 2006. • A. Bogris (UoA), P. Velanas (UoA), D. Syvridis (UoA), Numerical Investigation of a 160 Gb/s Reconfigurable Photonic logic gate based on Cross Phase Modulation in Fibers, Photonics Technology Letters, Vol. 19, No. 6, pp. 402-404, March 2007. • A. Bianco (PoliTO), F. Neri (PoliTO), C. Piglione (PoliTO), Optical switching nodes: architectures and performance, IEEE Workshop on High Performance Switching and Routing (HPSR 2007), Brooklyn, NY (USA), May 2007. • T. Orphanoudakis (UoPelop), A. Drakos (UoPelop), C. Matrakidis (UoPelop), C. Politi (UoPelop), A. Stavdas (UoPelop), An Efficient Optical Switch Architecture with Controlled Latency for GRID Networks, Proc. of GOBS 2007 - The First International Workshop on GRID over Optical Burst Switching Networks, Athens, Greece, June 2007.

42. JP-S Plan for Second Year • D.JP-S.3 [T0+24] Final JP-S report: “Electro-Optic Switching Architectures” • Evaluation by means of simulation of • Network architectures and protocols for efficient resource allocation (utilization, loss and delay performance) • Investigation of switch complexity and trade-off between space, wavelength and time domains • Study of further architectures for implementing joint exploitation of different contention resolution contexts • Asynchronous architectures • Efficient switch control algorithms under different operational constraints (network architectures) • Investigation of power consumption issues • M.JP-S.4 [T0+22] Editing of joint paper

43. Final Comments • After initial delay in starting its activities JP-S is on track • Progress (Milestones & Deliverables) according to schedule • Effort allocation according to plan • Budget allocation relatively lower than planned due to resource re-allocation between WPs • WP JP-S is characterized by • Strong focus – limited group of participants • Good collaboration • Significant technical contributions & impact