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Understanding Operational Amplifier Limitations and Long-Term Stability

Understanding Operational Amplifier Limitations and Long-Term Stability. By Marek Lis Sr Application Engineer Texas Instruments -Tucson. Introductions. Art Kay, PA-Linear Applications Manager Mixed Signal “System-on-a-Chip” Bridge Sensor Signal Conditioning

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Understanding Operational Amplifier Limitations and Long-Term Stability

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  1. Understanding Operational Amplifier Limitations and Long-Term Stability By Marek Lis Sr Application Engineer Texas Instruments -Tucson

  2. Introductions • Art Kay, PA-Linear Applications Manager • Mixed Signal “System-on-a-Chip” • Bridge Sensor Signal Conditioning • Evaluation Modules (hardware / software) • Noise • Northrop Grumman, Burr-Brown (Test Engineering) • Cleveland State, Georgia Tech Grad.

  3. Summary of Topics • Review of Op-Amp Input Topologies • Common Mode limits • Causes of Op-Amp Output Phase Inversion • Bipolar vs. JFET input effects caused by exceeding the Vcm • Review of Op-Amp Output Topologies • Output Swing limits • Long-Term Stability Spec • for specs centered around a fixed value • for parameters specified as an absolute value

  4. Input Stage Considerations

  5. REAL WORLD Vcm Input Range

  6. OP AMP OPERATION vs SUPPLY VOLTAGE Each amplifier has 36V supplies! The common mode in each case is the supply midpoint. All amps can act as “single supply” Note: A single-supply optimized op amp is not the same as a single supply op amp.

  7. MOSFET Simple Input (Vcm to negative rail)

  8. Simplified schematic of OPA336 input stage(Swing to Positive Rail)

  9. Simplified schematic of OPA336 input stage (Swing to Negative Rail)

  10. Typical Bipolar or JFET Input (not rail-to-rail)

  11. Simplified schematic of OPA827 input stageSwing to Negative Rail

  12. MOSFET Complementary N-P-FET (rail-to-rail)

  13. Simplified schematic of OPA703 input stage

  14. OPA703 Complementary CMOS (rail-to-rail)

  15. MOSFET Charge Pump (rail-to-rail)

  16. Remember from Earler in the presentation… The limit is based on the positive supply minus saturation voltage and Vgs.

  17. MOSFET Charge Pump (rail-to-rail) • Supplies a small current to input • GBW = 50MHz, Charge Pump Freq=10MHz

  18. MOSFET Zero Drift (rail-to-rail) No Offset Correction With Offset Correction

  19. MOSFET Zero Drift (rail-to-rail)

  20. Zero Drift Chopper Topology

  21. Input Bias Current in Chopper Op Amps

  22. Zero Drift Auto-Zero Topology

  23. Chopper topology Minor aliasing issue Best noise Low freq. Wide band Ripple Issue (frequency close to UGB) Auto-zero topology Aliasing issue Increased noise Low freq. Wide band Low ripple (low frequency ~ few kHz) Topology Summary

  24. Op Amp Output Phase Inversion

  25. Typical Case of Op Amp Phase Inversion due to exceeding Vcm

  26. PNP Bipolar Input Op Amp Low Common-Mode LimitationNormal Operation – No Phase Inversion

  27. PNP Bipolar Input Op Amp Low Common-Mode LimitationPhase Inversion Issue!

  28. Op Amp Input Common-Mode Below Negative Rail

  29. Op Amp Input Common-Mode Above Positive Rail

  30. An Example of IC Circuit used to Prevent a Phase Inversion

  31. Summary of Output Phase Inversion What causes a phase reversal? Exceeding the input common-mode voltage range may cause a phase reversal. How can it be prevented? Staying with op amp specified Vcm linear region Using op amp with a built-in anti-phase reversal circuitry Utilizing external circuitry to prevent a phase inversion Is it process dependent?  Some built-in anti-phase reversal circuitry might be process dependent depending on topology used Most modern op amps use a robust topologies assuring no phase reversal How can a customer be confidant of no phase reversal? (if it is not explicitly stated in the data sheet) Apply a slow triangular waveform in a buffer configuration 1V beyond rails to test for phase inversion - you must limit the input current to less than 10mA to prevent damaging IC

  32. Output Stage Considerations

  33. REAL WORLD Outputs

  34. Classic Output Stage • Common-emitter output • Current source driver • Headroom set by VBE+VCESAT • Unity Gain VBE VBE

  35. OPA827 – Classic Output OPA827 OPA827 Short Circuit Limit Output Saturated

  36. OPA827 – Classic Output OPA827 The Table Output Swing is defined at: Vout swing = 18V – 3V = ±15V Iout = 15V/1k = 15mA For Aol > 120dB As you approach the limit or increase ILOAD, Aol will decrease.

  37. R-to-R Output Stage Vsat = 50mV to ≈ 1mV Vsat = 0.2V • Common Collector or Common Drain • Headroom set by VDSsat or VCEsat • On bipolar sat is approximately 0.2V • After sat Beta drops dramatically • On FET sat is limited by output transistor scaling • Can achieve very low sat values (e.g. mV)

  38. R-to-R Output Stage • Value of RLOAD affects AOL and Output Swing • the gain in the last stage is set by rout / gm • rout decreases with loading

  39. Why can’t we get Rail-to-Rail on CMOS?MOSFET Characteristic Curves • Some minimum drain to source voltage is required. • Increasing current requires more Vgs.

  40. Typical Rail-to-Rail Input/Output Topology

  41. OPA211 – rail-to-rail Out (Bipolar) Loading limits output swing and reduces Aol.

  42. Achieving Output Swing to the Negative Rail

  43. SS Pull Down Cheat Sheet Selected to sink quiescent current in output stage. Approximately ½ Iq.

  44. Op Amp Output Range Consideration

  45. Long-Term Stability

  46. Gaussian (or Normal) Distribution 68% within ±1 standard deviation 99.7% within ±3 standard deviations

  47. Double Ended Limit Symmetrical Limits: Max = 150uV is +/-150uV Mean = often approximately zero Typical = Mean + σ ≈ σ Max = + 3σ (or greater) Min = - 3σ (or smaller)

  48. Long-Term (10 year) Shift for Gaussian Distributions(Centered around a Mean Value) Initial PDS Distribution (blue) vs Long-Term Parametric Shift (green) For 10 year life of a product.

  49. Life-Time Vos and Vos Temp Drift Shift Max LT Vos = 240uV Max LT Vos Drift = 2.0uV/C Life-Time Max Shift (ten-year) = Max Initial Value Long-Term Max Spec = 2 * Initial Spec

  50. Life-Time Output Voltage Initial Accuracy Shift(specs centered around a fixed value) Max LT Vref = +/-0.1%

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