General Purpose Node-to-Network Interface in Scalable Multiprocessors

1. General Purpose Node-to-Network Interfacein Scalable Multiprocessors CS 258, Spring 99 David E. Culler Computer Science Division U.C. Berkeley

2. *T: Network Co-Processor CS258 S99

3. iWARP: Systolic Computation • Nodes integrate communication with computation on systolic basis • Msg data direct to register • Stream into memory Host Interface unit CS258 S99

4. P P Dedicated Message Processor Network • General Purpose processor performs arbitrary output processing (at system level) • General Purpose processor interprets incoming network transactions (at system level) • User Processor <–> Msg Processor share memory • Msg Processor <–> Msg Processor via system network transaction dest ° ° °  Mem Mem NI NI M P M P User System User System CS258 S99

5. P P Levels of Network Transaction Network • User Processor stores cmd / msg / data into shared output queue • must still check for output queue full (or make elastic) • Communication assists make transaction happen • checking, translation, scheduling, transport, interpretation • Effect observed on destination address space and/or events • Protocol divided between two layers dest ° ° °  Mem Mem NI NI M P M P User System CS258 S99

6. Service Network I/O Nodes I/O Nodes Devices Devices 16 175 MB/s Duplex rte MP handler Mem 2048 B ° ° °  EOP Var data NI 64 i860xp 50 MHz 16 KB $ 4-way 32B Block MESI 400 MB/s sDMA $ $ rDMA P M P Example: Intel Paragon CS258 S99

7. User Level Abstraction (Lok Liu) IQ IQ • Any user process can post a transaction for any other in protection domain • communication layer moves OQsrc –> IQdest • may involve indirection: VASsrc –> VASdest Proc Proc OQ OQ VAS VAS IQ IQ Proc Proc OQ OQ VAS VAS CS258 S99

8. Msg Processor Events User Output Queues DMA done System Event Send DMA Compute Processor Kernel Dispatcher Rcv DMA Rcv FIFO ~Full Send FIFO ~Empty CS258 S99

9. Basic Implementation Costs: Scalar 10.5 µs Net • Cache-to-cache transfer (two 32B lines, quad word ops) • producer: read(miss,S), chk, write(S,WT), write(I,WT),write(S,WT) • consumer: read(miss,S), chk, read(H), read(miss,S), read(H),write(S,WT) • to NI FIFO: read status, chk, write, . . . • from NI FIFO: read status, chk, dispatch, read, read, . . . CP MP MP CP 2 1.5 2 2 2 2 Registers 7 wds Cache User OQ User IQ Net FIFO 4.4 µs 5.4 µs 250ns + H*40ns CS258 S99

10. Virtual DMA -> Virtual DMA sDMA rDMA • Send MP segments into 8K pages and does VA –> PA • Recv MP reassembles, does dispatch and VA –> PA per page Memory CP CP MP Net MP MP 2 2 2 2 1.5 2 Registers 7 wds Cache hdr 400 MB/s User IQ User OQ 400 MB/s 2048 2048 Net FIFO 175 MB/s CS258 S99

11. Single Page Transfer Rate Effective Buffer Size: 3232 Actual Buffer Size: 2048 CS258 S99

12. Msg Processor Assessment • Concurrency Intensive • Need to keep inbound flows moving while outbound flows stalled • Large transfers segmented • Reduces overhead but adds latency VAS User Output Queues User Input Queues DMA done System Event Send DMA Compute Processor Kernel Dispatcher Rcv DMA Rcv FIFO ~Full Send FIFO ~Empty CS258 S99

13. Case Study: Meiko CS2 Concept • Circuit-switched Network Transaction • source-dest circuit held open for request response • limited cmd set executed directly on NI • Dedicated communication processor for each step in flow CS258 S99

14. Case Study: Meiko CS2 Organization CS258 S99

15. Shared Physical Address Space • NI emulates memory controller at source • NI emulates processor at dest • must be deadlock free CS258 S99

16. Case Study: Cray T3D • Build up info in ‘shell’ • Remote memory operations encoded in address CS258 S99

17. Case Study: NOW • General purpose processor embedded in NIC CS258 S99

18. T o t a l c o m m u n i c a t i o n l a t e n c y O L O r s O b s e r v e d n e t w o r k D e s t i n a t i o n p r o c e s s o r l a t e n c y e c r u C o m m u n i c a t i o n a s s i s t o s e r N e t w o r k e n i h C o m m u n i c a t i o n a s s i s t c a M S o u r c e p r o c e s s o r T i m e o f t h e m e s s a g e Message Time Breakdown • Communication pipeline CS258 S99

19. Message Time Comparison CS258 S99

20. SAS Time Comparison CS258 S99

21. Message-Passing Time vs Size CS258 S99

22. Message-Passing Bandwidth vs Size CS258 S99

23. Application Performance on LU CS258 S99

24. Working Sets Change with P 8-fold reduction in miss rate from 4 to 8 proc CS258 S99

25. Application Performance on BT CS258 S99

26. NAS Communication Scaling Normalized Msgs per Proc Average Message Size CS258 S99

27. NAS Communication Scaling: Volume CS258 S99

28. Communication Characteristics: BT CS258 S99

29. Beware Average BW analysis CS258 S99

30. Reflective Memory • Writes to local region reflected to remote CS258 S99

31. Case Study: DEC Memory Channel • See also Shrimp CS258 S99

32. Scalable Synchronization Operations • Messages: point-to-point synchronization • Build all-to-all as trees • Recall: sophisticated locks reduced contention by spinning on separate locations • caching brought them local • test&test&set, ticket-lock, array lock • O(p) space • Problem: with array lock location determined by arrival order => not likely to be local • Solution: queue-lock • build distributed linked-list, each spins on local node CS258 S99

33. Queue Locks • Head holds lock; Each points to next waiter • Shared pointer to tail • Acquire • swap (fetch&store) tail with node address, chain in prev • Release • signal next • compare&swap plus check to reset tail CS258 S99

34. Parallel Prefix: Upward Sweep • generalization of barrier (reduce-broadcast) • compute S i = X i+ X i-1 + ... + X0, for i = 0, 1, ... • combine children, store least significant CS258 S99

35. Downward Sweep of parallel Prefix • Least branch send to most sig child • when receive from above • send to least significant • combine with stored and send result to most sign CS258 S99