FPGA PLB Evaluation using Quantified Boolean Satisfiability

1. FPGA PLB Evaluation using Quantified Boolean Satisfiability Andrew C. Ling M.A.Sc. CandidateUniversity of Toronto Deshanand P. Singh Ph.D. Altera Corporation Professor Stephen D. Brown Altera Corporation Toronto University of Toronto

2. Background: FPGA

3. Background: K-LUT

4. Background: K-InputPLB • The 3-input PLB below CANNOT implement any arbitrary 3-input function

5. Background: K-InputPLB

6. Motivation • The cost of implementing a circuit in an FPGA is directly proportional to the number of PLBs required to implement the functionality of the circuit. • Decreasing the number of PLBs may allow a circuit to be realized in a smaller FPGA. • The PLB architecture has a significant impact on the number of PLBs required to realize a particular circuit.

7. PLB Evaluation in terms of Area • Clever PLB designs are necessary to capture the majority of the functions encountered in typical circuits. • Extract set of k-Input functions from a large set of circuits. • Examine the percentage of functions that map into the PLB structure.

8. Function Mapping Problem QSAT ?

9. C1 C2 C3 Background: The Propositional Satisfiability (SAT) problem Given a formula, f : • Defined over a set of variables, V (a,b,c) • Comprised of a conjunction of clauses (C1,C2,C3) • Each clause is a disjunction of literals of the variables V SAT: Seek an assignment of to the variables, V, which sets the Boolean formula to ‘1’. Example : a=b=c=1

10. E A C1 C2 C3 Background: The Quantified Satisfiability (QSAT) problem Given a formula, f : • Defined over a set of variables, V (a,b,c) • Comprised of a conjunction of clauses (C1,C2,C3) • Each clause is a disjunction of literals of the variables V • Quantifiers exist on variables V QSAT: Seek an assignment of to the variables, V, which sets the quantified Boolean formula (QBF) to ‘1’. Example : b=c=1 a = {0,1}

11. Function Mapping Problem QSAT ?

12. Construction of CNF • T. Larrabee, “Test pattern generation using Boolean satisfiability," TCAD, 1992 (Plaisted's and Greenbaum's encoding which is based on Tseitin's work) • Creates a Characteristic Function for circuits f=(x2+¬g) (x1+¬g) (¬x2+¬x1+g)

13. Construction of CNF (cont’d) f AND= (x2+¬z1) (x1+¬z1) (¬x2+¬x1+ z1) f OR= (¬x3+g) (¬z1+g) (x3+z1+ ¬g) f total= fAND fOR = (x2+¬z1) (x1+¬z1) (¬x2+¬x1+ z1) (¬x3+g) (¬z1+g) (x3+z1+ ¬g)

14. Function Mapping Problem QSAT ?

15. Formulating Function Mapping Problem ? • Can function fbe implemented in circuit g ? • Does there exist a configuration to gsuch that for all inputs to g, f is equivalent to g

16. Formulating Function Mapping Problem ? • Derive characteristic function Hfor circuit g • Replace all instances of g in H with f • H[g/f](g ≡ f ) • f is equivalent to g

17. Formulating Function Mapping Problem ? • Does there exist a configuration to gsuch that for all inputs to g, f is equivalent to g ? (g ≡ f )

18. Formulating Function Mapping Problem ? • Does there exist a configuration to gsuch that for all inputs to g, f is equivalent to g ? E A l1…lmx1…xn(g ≡ f )

19. Formulating Function Mapping Problem QSAT • Express as a QBF with inputs (x1…xn) and configuration bits (l1…lm) l1…lmx1…xn(g ≡ f ) E A

20. Results: Evaluation of PLBs • Given a circuit, extract 1000 k-input functions • k == number of inputs to PLB • Determine number of functions that map into PLB using QSAT • Find a fit percentage

21. Results: Evaluation of PLBs

22. Conclusions • Novell function mapping technique based on QSAT. • We can use this technique to evaluate PLB architectures based on area.

23. Future Work • Speed up QSAT, use ALL-solution SAT solvers or better QBF solvers • Cannot evaluate area efficiency without looking at routing architecture • Use “Don’t Cares” when mapping functions • Use genetic algorithms to create candidate PLBs, then pipe architectures to our PLB evaluator tool

24. Questions?