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Progettazione di circuiti e sistemi VLSI. Anno Accademico 2010-2011 Lezione 3 16.3.2012 Dispositivi e modelli. Goal of this chapter. Presents intuitive understanding of device operation Introduction of basic device equations Introduction of models for manual analysis
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Progettazione di circuiti e sistemi VLSI Anno Accademico 2010-2011 Lezione 3 16.3.2012 Dispositivi e modelli Dispositivi e modelli
Goal of this chapter • Presents intuitive understanding of device operation • Introduction of basic device equations • Introduction of models for manual analysis • Introduction of models for SPICE simulation • Analysis of secondary and deep-sub-micron effects • Future trends Dispositivi e modelli
B A Al SiO 2 p n Cross-section of pn -junction in an IC process A Al A p n B B One-dimensional representation diode symbol The Diode Mostly occurring as parasitic element in Digital ICs Dispositivi e modelli
Depletion Region Dispositivi e modelli
Forward Bias Typically avoided in Digital ICs Dispositivi e modelli
Reverse Bias The Dominant Operation Mode Dispositivi e modelli
Diode Current Dispositivi e modelli
Models for Manual Analysis Dispositivi e modelli
Junction Capacitance Dispositivi e modelli
Diode Model Dispositivi e modelli
SPICE Parameters Dispositivi e modelli
|V | GS A Switch! An MOS Transistor What is a Transistor? Dispositivi e modelli
The MOS Transistor Dispositivi e modelli
MOS Transistors -Types and Symbols D D G G S S Depletion NMOS Enhancement NMOS D D G G B S S NMOS with PMOS Enhancement Bulk Contact Dispositivi e modelli
Threshold Voltage: Concept Dispositivi e modelli
The Threshold Voltage Dispositivi e modelli
The Body Effect Dispositivi e modelli
Current-Voltage RelationsA good ol’ transistor -4 x 10 6 VGS= 2.5 V 5 Resistive Saturation 4 VGS= 2.0 V (A) 3 VDS = VGS - VT D I 2 VGS= 1.5 V 1 VGS= 1.0 V 0 0 0.5 1 1.5 2 2.5 V (V) DS Dispositivi e modelli
Transistor in Linear Dispositivi e modelli
Transistor in Saturation Pinch-off Dispositivi e modelli
Current-Voltage RelationsLong-Channel Device Dispositivi e modelli
A model for manual analysis Dispositivi e modelli
Current-Voltage RelationsThe Deep-Submicron Era -4 x 10 2.5 VGS= 2.5 V Early Saturation 2 VGS= 2.0 V 1.5 Linear Relationship (A) D I VGS= 1.5 V 1 VGS= 1.0 V 0.5 0 0 0.5 1 1.5 2 2.5 V (V) DS Dispositivi e modelli
Velocity Saturation 5 u = 10 sat ) s Constant velocity / m ( n u Constant mobility (slope = µ) x = 1.5 x (V/µm) c Dispositivi e modelli
Perspective I D Long-channel device V = V GS DD Short-channel device V V - V V DSAT GS T DS Dispositivi e modelli
ID versus VGS -4 x 10 -4 x 10 6 2.5 5 linear 2 quadratic 4 1.5 (A) 3 (A) D D I I 1 2 quadratic 0.5 1 0 0 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 V (V) V (V) Long Channel Short Channel GS GS Dispositivi e modelli
ID versus VDS -4 -4 x 10 x 10 2.5 6 VGS= 2.5 V VGS= 2.5 V 5 2 Resistive Saturation VGS= 2.0 V 4 VGS= 2.0 V 1.5 (A) (A) 3 D D VDS = VGS - VT I I VGS= 1.5 V 1 2 VGS= 1.5 V VGS= 1.0 V 0.5 1 VGS= 1.0 V 0 0 Long Channel Short Channel 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 V (V) V (V) DS DS Dispositivi e modelli
A unified modelfor manual analysis G S D B Dispositivi e modelli
Simple Model versus SPICE -4 x 10 2.5 VDS=VDSAT 2 VelocitySaturated 1.5 (A) Linear D I 1 VDSAT=VGT 0.5 VDS=VGT Saturated 0 0 0.5 1 1.5 2 2.5 V (V) DS Dispositivi e modelli
A PMOS Transistor -4 x 10 0 VGS = -1.0V -0.2 VGS = -1.5V -0.4 (A) VGS = -2.0V Assume all variables negative! D I -0.6 VGS = -2.5V -0.8 -1 -2.5 -2 -1.5 -1 -0.5 0 V (V) DS Dispositivi e modelli
Transistor Model for Manual Analysis Dispositivi e modelli
The Transistor as a Switch Dispositivi e modelli
The Transistor as a Switch Dispositivi e modelli
The Transistor as a Switch Dispositivi e modelli
MOS CapacitancesDynamic Behavior Dispositivi e modelli
Dynamic Behavior of MOS Transistor Dispositivi e modelli
The Gate Capacitance Polysilicongate Source Drain W x x + + n n d d Gate-bulk L d overlap Top view Gate oxide t ox + + n n L Cross section Dispositivi e modelli
Gate Capacitance Cut-off Resistive Saturation Most important regions in digital design: saturation and cut-off Dispositivi e modelli
Diffusion Capacitance Channel-stop implant N 1 A Side wall Source W N D Bottom x Side wall j Channel L Substrate N S A Dispositivi e modelli