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Issues in Integrated Circuit Design for UHF RFID

Issues in Integrated Circuit Design for UHF RFID. Zhihua WANG,Xuguang SUN, Chun ZHANG,Yongming LI Institute of Microelectronics, Tsinghua University,Beijing,100084,P.R.China. RFIT2007-IEEE International Workshop on Radio-Frequency Integration Technology, pp.322-328 Dec.9-11,2007,Singapore.

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Issues in Integrated Circuit Design for UHF RFID

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  1. Issues in Integrated Circuit Design for UHF RFID Zhihua WANG,Xuguang SUN, Chun ZHANG,Yongming LI Institute of Microelectronics, Tsinghua University,Beijing,100084,P.R.China RFIT2007-IEEE International Workshop on Radio-Frequency Integration Technology, pp.322-328 Dec.9-11,2007,Singapore Advisor: Yens ho Reporter: C.C.Lan

  2. Outline • Introuction • Issues in Tag • Issues in Reader • Design Instances • Conclusion C.C.Lan

  3. Introduction • Bar code • Disadvantage- • Lack of programmability • Limited storage capacity • In sight operation distance and low data throughput • RFID system • Consists of • A reader • Several tags C.C.Lan

  4. Issues in Tag • Low Power Design • Rectifier Design • Anti-collision Mechanism • Security Mechanism • On-chip Antenna C.C.Lan

  5. Low Power Design • Digital: • Lower the supply voltage • 1.5V supply voltage in 0.5 m CMOS process • 1.14V supply voltage in 0.18 m CMOS process • 0.6V supply voltage in 0.18 m CMOS process • Lower the clock frequency • Clock separation technique(3.35~3.75MHz clock for PIE decoding) • Digital clock manager(1MHz to produce a synchronous 40KHz clock with Manchester-coded) C.C.Lan

  6. Low Power Design • Analog: • Voltage regulator • Perform well as the input RF power varies more than 30dB • Design regulator into two stages( near field, far field) • On-chip oscillator • Ring oscillator • Current starve ring oscillator • Low voltage current mirrors C.C.Lan

  7. Rectifier Design C.C.Lan

  8. Rectifier Design C.C.Lan

  9. Anti-collision Mechanism • Aloha based protocol • To reduce the collision probability by separating tag transmission in distinct time slot • Key research- to optimize the slot number • Tree based protocol • Use a group splitting mechanism • Disadvantage is the relatively long identification delay • Adaptive binary splitting protocol • Improve to shorten identification time C.C.Lan

  10. Security Mechanism • Authentication • Mutual three-pass authentication • Encryption • A low power encryption hardware using TEA algorithm • SHA-1 algorithm C.C.Lan

  11. On-Chip Antenna • In some applications, where the operation distance is a primary consideration • OCA can be an effective way to cut down the total cost and make the size of tag small C.C.Lan

  12. Issues in Reader • Carrier Leakage Problem • CMOS PA design C.C.Lan

  13. Carrier Leakage Problem C.C.Lan

  14. Carrier Leakage Problem C.C.Lan

  15. Carrier Leakage Problem C.C.Lan

  16. Design Instances • A passive RFID Tag with Standard EEPROM • A security Module using XTEA Algorithm • A Single Chip RFID Reader Transceiver C.C.Lan

  17. A passive RFID Tag with Standard EEPROM C.C.Lan

  18. A passive RFID Tag with Standard EEPROM C.C.Lan

  19. A passive RFID Tag with Standard EEPROM C.C.Lan

  20. A security Module using XTEAAlgorithm C.C.Lan

  21. A Single Chip RFID Reader Transceiver C.C.Lan

  22. A Single Chip RFID Reader Transceiver C.C.Lan

  23. Conclusion • looks into the UHF RFID IC design in which both tag and reader have their own design challenges • Issues in RFID • Low power, energy harvesting, anti-collision, security, and OCA in tag design • Carrier leakage and CMOS PA in reader C.C.Lan

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