1 / 96

Section 1.3 Asynchronous Circuits Exercises

Section 1.3 Asynchronous Circuits Exercises. Alfredo Benso Politecnico di Torino, Italy Alfredo.benso@polito.it. #1. Find a minimal race free state coding for the following transition table. Also, find the boolean functions representing the future state. c=0 c=1. ab.

nydia
Download Presentation

Section 1.3 Asynchronous Circuits Exercises

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Section 1.3Asynchronous CircuitsExercises Alfredo Benso Politecnico di Torino, Italy Alfredo.benso@polito.it

  2. #1 • Find a minimal race free state coding for the following transition table. • Also, find the boolean functions representing the future state. c=0 c=1 ab 00 01 11 10 00 01 11 10 A A A B C D A A B B A - C B A D C B C C C C C B B D C D A C - A D D A D

  3. #1: stable states c=0 c=1 00 01 11 10 00 01 11 10 A A A B C D A A B B A - C B A D C B C C C C C B B D C D A C - A D D A D

  4. #1: Vicinity graph D C c=0 c=1 00 01 11 10 00 01 11 10 A A A B C D A A B B A - C B A D C B C C C C C B B D C D A C - A D D A D A B

  5. #1: Minimize the vicinity graph C D c=0 c=1 00 01 11 10 00 01 11 10 A A A B C D A A B B A - C B A D C B C C C C C B B D C D A C - A D D A D A B

  6. #1: Minimize the vicinity graph C D 10 11 00 01 c=0 c=1 00 01 11 10 00 01 11 10 A A A B C B A A B B A - C B D D A B C C C C C D B A C D B C - C D D B D A B

  7. #2 • Design the reduced transition table of an asynchronous circuit functioning in fundamental mode. The circuit has three inputs a, b, and c, and one output U, which is 1 only if all inputs are equal to ‘1’, and they went to ‘1’ in the order a, b, and c. U returns to 0 when all inputs returned to ‘0’. • Also, find the minimum number of state variables required to have a race free state assignment, and find a possible state assignment.

  8. #2: Transition table • We have to recognize the following sequence: 000  100  110  111 c=0 c=1 00 01 11 10 00 01 11 10 A Waiting for 100 B Waiting for 110 C Waiting for 111 D OK! Now waiting for all 0 E Wrong sequence.

  9. #2: Transition table • We have to recognize the following sequence: 000  100  110  111 c=0 c=1 00 01 11 10 00 01 11 10 A Waiting for 100 B Waiting for 110 C Waiting for 111 D OK! Now waiting for all 0 E Wrong sequence.

  10. #2: Minimize the transition table c=0 c=1 00 01 11 10 00 01 11 10 A Waiting for 100 B Waiting for 110 C Waiting for 111 D OK! Now waiting for all 0 E Wrong sequence. States A and B are compatible, so I can collapse them in one state

  11. #2: Minimize the transition table c=0 c=1 00 01 11 10 00 01 11 10 A Waiting for 100 & 110 C Waiting for 111 D OK! Now waiting for all 0 E Wrong sequence. States A and B are compatible, so I can collapse them in one state

  12. #2: Vicinity graph E D c=0 c=1 00 01 11 10 00 01 11 10 A C A C D E A-C and C-E are essential, so we can try to eliminate A-E and C-D

  13. #2: Vicinity graph E D 00 10 11 01 c=0 c=1 A C 00 01 11 10 00 01 11 10 A C D E

  14. #3 • Find the Future State and Output functions of an asynchronous circuit functioning in fundamental mode. The circuit has three inputs X, Y, and Z and one output U, which goes to ‘1’ only when: • There is a rising edge of X AND • While the value of X was ‘0’, Y and Z followed the sequence 00 - 10 – 11 (even if BEFORE or AFTER this sequence Y and Z changed to different values). • U returns to ‘0’ as soon as X returns to ‘0’. • The circuit must have a race free state assignment.

  15. #3: Transition Table • We have to recognize the following sequence on Y and Z with X=0: 00  10  11 X=0 X=1 00 01 11 10 00 01 11 10 A Wait for 00 B Wait for 10 C Wait for 11 D Now wait for rising edge X E Wait for X to return to 0

  16. #3: Transition Table Minimization • B and C are compatible so they can be collapsed in one state X=0 X=1 00 01 11 10 00 01 11 10 A Wait for 00 B Wait for 10 & 11 D Now wait for rising edge X E Wait for X to return to 0

  17. #3: Transition Table Minimization D E X=0 X=1 00 01 11 10 00 01 11 10 A B D E A B I can remove E-B going trough E - A - B

  18. #3: Transition Table Minimization D E 11 10 X=0 X=1 00 01 11 10 00 01 11 10 A B D E A B 00 01

  19. #3: Output function X=0 X=1 00 01 11 10 00 01 11 10 00 01 11 10

  20. #3: Output function X=0 X=1 00 01 11 10 00 01 11 10 00 01 11 10 U = X S0

  21. #3: Future state function X=0 X=1 00 01 11 10 00 01 11 10 00 01 11 10

  22. #3: Future state function X=0 X=1 00 01 11 10 00 01 11 10 00 01 11 10 S0 = S0S1 + XS0 + YZS1

  23. #3: Future state function X=0 X=1 00 01 11 10 00 01 11 10 00 01 11 10 S1 = S0S1X + XYZS1 + XYZS0 + XYZS1

  24. #5 • Design the reduced transition table of an asynchronous circuit functioning in fundamental mode. The circuit has two inputs X and Y, and one output U, which is 1 only if X=1 and, during the last two rising-edges of X, Y maintained the same value. • Also, find out the minimum number of state variables required to have a race free state assignment.

  25. #5: Primitive Transition table XY 00 01 11 10 A A,0 A,0 E,0 B,0 wait for the first transition of X B C,0 C, 0 B,0 B,0 1st trans. & Y=0 – wait for X to go low C C,0 C,0 E,0 D,- wait for another transition of X D H,- H,- D,1 D,1 2nd trans. & Y=0 – wait for X to go low E F,0 F,0 E,0 E,0 1st trans. & Y=1 –wait for X to go low F F,0 F,0 G,- B,0 wait for another transition G I,- I,- G,1 G,1 2nd trans. & Y=1 – wait for X to go low H H,0 H,0 E,0 D,- last 2 trans Y=0 – wait for a new transition I I,0 I,0 G,- B,0 last 2 trans Y=1 – wait for a new transition

  26. #5: Reduced Transition table XW 00 01 11 10 A A,0 A,0 E,0 B,0 Equivalent states: C & H  C B C,0 C, 0 B,0 B,0 F & I  F C C,0 C,0 E,0 D,- No compatible states D H,- H,- D,1 D,1 E F,0 F,0 E,0 E,0 F F,0 F,0 G,- B,0 G I,- I,- G,1 G,1 H H,0 H,0 E,0 D,- I I,0 I,0 G,- B,0

  27. #5: Reduced Transition table XW 00 01 11 10 A A,0 A,0 E,0 B,0 Equivalent states: C & H  C B C,0 C, 0 B,0 B,0 F & I  F C C,0 C,0 E,0 D,- No compatible states D H,- H,- D,1 D,1 E F,0 F,0 E,0 E,0 F F,0 F,0 G,- B,0 G I,- I,- G,1 G,1 H H,0 H,0 E,0 D,- I I,0 I,0 G,- B,0

  28. #5: Reduced Transition table XW 00 01 11 10 A A,0 A,0 E,0 B,0 Equivalent states: C & H  C B C,0 C, 0 B,0 B,0 F & I  F C C,0 C,0 E,0 D,- No compatible states D H,- H,- D,1 D,1 E F,0 F,0 E,0 E,0 F F,0 F,0 G,- B,0 G I,- I,- G,1 G,1 H H,0 H,0 E,0 D,- I I,0 I,0 G,- B,0

  29. #5: Reduced Transition table XW 00 01 11 10 A A,0 A,0 E,0 B,0 Equivalent states: C & H  C B C,0 C, 0 B,0 B,0 F & I  F C C,0 C,0 E,0 D,- No compatible states D C,- C,- D,1 D,1 E F,0 F,0 E,0 E,0 F F,0 F,0 G,- B,0 G F,- F,- G,1 G,1

  30. #5: Vicinity Graph • Max outdegree is 3. I need at least three state variables A B C D E F G

  31. #5: Vicinity Graph B C D E F G A ? ? 011 111 ? ? 001 101 ? ? 110 010 ? ? 000 100 • It seems that there is no solution with three variables. • Either we need 4 state variables

  32. #6 • Design the gate level model of an asynchronous circuit functioning in fundamental mode. The circuit has two inputs P (pulse) and R (reset) and one output Z, which is normally at ‘0’. Z follows the following rules: • It goes to ‘1’ when a rising edge is detected on P and R=0. • It goes to ‘0’ when R=1.

  33. #6: Transition table P R Let’s start with the correct sequence. R=0 and P=0 and we wait for a transition on P. 00 01 11 10 A 0 - - B - A C - C - B 1 B 1 B We can stay in B until R changes back to 1. C If R goes to 1, Z goes to 0 but we have to wait for R to go to 0 again before checking for another rising edge on P

  34. #6: Transition table P R We can exit C only when both R and P are ‘0’. 00 01 11 10 A 0 C 0 - - B - A C - C - B 1 B 1 If R goes to 1 while we are waiting for a rising edge on P, we go out-of-sequence. B A 0 C 0 C 0 C 0 C

  35. #6: Vicinity graph 00 01 P R 00 01 11 10 A 2 C A 0 C 0 - - B - A C - C - B 1 B 1 B 1 2 A 0 C 0 C 0 C 0 C B

  36. #6: Vicinity graph P R 00 01 11 10 A 2 C A 0 C 0 C 0 B - A A 0 A 0 B 1 B 1 B 1 2 A 0 C 0 C 0 C 0 C B

  37. #6: Race free state assignment P R 00 10 00 01 11 10 A C A 0 C 0 C 0 B - A A 0 A 0 B 1 B 1 B A 0 C 0 C 0 C 0 C 01 B

  38. #6: Output function P R P R 00 01 11 10 00 01 11 10 S0 S1 A 0 C 0 C 0 B - 00 00 A 0 A 0 B 1 B 1 01 01 A 0 C 0 C 0 C 0 10 11 10 Z = S0S1R

  39. #6: State function P R P R 00 01 11 10 00 01 11 10 S0 S1 A 0 C 0 C 0 B - 00 00 A 0 A 0 B 1 B 1 01 01 A 0 C 0 C 0 C 0 10 11 10

  40. #6: S0 variable S0 = S0 P + S1 R P R P R 00 01 11 10 00 01 11 10 S0 S1 A 0 C 0 C 0 B - 00 00 A 0 A 0 B 1 B 1 01 01 A 0 C 0 C 0 C 0 10 11 10

  41. #6: S1 variable P R P R 00 01 11 10 00 01 11 10 S0 S1 A 0 C 0 C 0 B - 00 00 A 0 A 0 B 1 B 1 01 01 A 0 C 0 C 0 C 0 10 11 10 S1 = S1 R + S0 P R

  42. #6: Final circuit Z P R S0 S1

  43. #10 • Design an asynchronous circuit functioning in fundamental mode. The circuit has two inputs A and B, and one output Z, which is normally at ‘0’. Z changes value when it recognize the sequence 00 – 01 – 00 on the inputs. 00 can be considered concurrently the end of a sequence and the beginning of a new one. • Show: • A Minimized Transition table • A race free state assignment • The Boolean function for Z

  44. #10: Transition Table Out of sequence 00 01 11 10 A Wait for 00 Wait for 01; Sequence OK B Wait for 00 C Sequence OK; wait for 01 D Wait for 00 E F

  45. #10: Transition Table 00 01 11 10 A Out of sequence; Wait for 00 U=0 Wait for 01 Sequence OK B Wait for 00 C Sequence OK; wait for 01 D U=1 Wait for 00 E F Out of sequence; wait for 00

  46. #10: Vicinity Graph • There are no equivalent or compatible states. 00 01 11 10 A C A B B C D E E F F D

  47. #10: Vicinity Graph • We can eliminate A – C and F - E 00 01 11 10 A C A B B C D E E F F D

  48. #10: Vicinity Graph • We can eliminate A – C and F - E 00 01 11 10 A C A B B C D E E F F D

  49. #10: Vicinity Graph • A race free state assignment is: 00 01 11 10 111 010 A B 110 C D 100 E F 001 000

  50. #10: Output Function • Be careful! To cover the table, you have to order the rows correctly: it has to be a K-map! 00 01 11 10 111 110 010 000 100 001

More Related