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68HC12 Overview

68HC12 Overview. Agenda. Day 1 Architecture overview Programming Parallel and Serial IO Day 2 Timer Interrupts ATD usage Table look up. 68HC912BC32 Features. CISC Accumulator based machine. 32K flash, 768B EEPROM, 1K RAM Debugger in flash and last ¼ of ram.

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68HC12 Overview

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  1. 68HC12 Overview

  2. Agenda • Day 1 • Architecture overview • Programming • Parallel and Serial IO • Day 2 • Timer Interrupts • ATD usage • Table look up

  3. 68HC912BC32 Features • CISC Accumulator based machine. • 32K flash, 768B EEPROM, 1K RAM • Debugger in flash and last ¼ of ram. • You will be limited to EEPROM and RAM for your code. • 16/8 bit operation • 8 - 10 bit ATD ports • 8 – Timer / Input Capture / Interrupt • 8 - 8 PWMs or 4 - 16 bit PWMs Pictures and Information courtesy of e-www.motorola.com

  4. Register Block

  5. Important Differences from 68K • Most instructions work on a memory address and a register. • Most instructions have the register as part of the name, not as an argument. • More flexible addressing modes. • Different Interrupt Handling.

  6. Example: * Comment starting a line LABEL ;Comment at end of line LDAA #$01 ;Load acumulator A with the hex value 1. LDAB #%1001 ;Load accumulator B with binary 1001 ( 9 ) ADDA #36 ;Add the value 36 to A ADDB 36 ;Add the contents of memory at 36 to label ADDD #$0A08 ;Treat accumulators A and B as one 16 bit ; accumulator, and add hex 0A08 BRA LABEL ;Branch Unconditionally

  7. Addressing modes • Immediate: Part of instruction LDAA #$01 • Direct/Extended: actual memory address ADDA #36 • Relative: Offset from current PC (used for branches) BRA LABEL • Indexed:Relative to an index register LDAA 0,X ;Address at index register X LDAA -1,X ;The byte before X LDAA 5,X ;5 bytes after X LDAA A,X ;Address at A+X LDAA 1,X+ ;Address at X, then increment X max +-8 LDAA 2,+X ;Increment X+2, then load the address LDAA [15,X] ;Load the address from 15+X. Then load the content of that address LDAA [D,X] ;Load the address from D+X. Then load the contents of that address

  8. Comparisons • Most instructions do implicit comparisons to zero. • Specific command to compare each register • CMPA #$05 • CPX #$9010 • TSTA ( compare to 0 ) • See section 2.1.5 of cpu12rm.pdf for CCR definitions

  9. Flow Control • Similar to 68K • Each instruction sets status bits • Branch on status bit settings • Long and short versions • Examples • bne - branch not equal, Z bit not set • bgt - branch greater than, /Z * /N • Bcs - branch carry set

  10. Function Calls • Instructions • BSR Branch sub routine • JSR Jump Sub-routine • RTS Return from sub routine • Stack management • PSH[A|B|X|Y] push variable onto stack • PUL[A|B|X|Y] pop variable from stack • Stack grows downward • LEAS –2,SP decrement SP by 2

  11. Interrupt routines • !Stores all registers for you • 9 bytes on the stack • RTI - return from interrupt, pops 9 bytes to restore registers. • Interrupt vectors moved by debugger, • Mapped from $FFC0~$FFFF to $0B00~$0B3F • Offset of $F4C0 from table in M68HC12B.pdf page 70. ( The data sheet )

  12. Important Stuff • Assembler: MINI-IDE • File extension: .asm • Power to EVB board: +5 volts • Do not power through ATD reference ports • Make sure you have the correct polarity. • You do not want to owe the department a new HC12

  13. Jumper Settings Boot to Loader (part of debugger) Boot to POD mode ( remote debugger) Boot to Code in EEProm $d00 Boot to Debugger in flash

  14. How to start your code .nolist;disable listing #include hc12.inc ;get the EQU's for all registers ;and ports .list;re-enable listing org EE_START ;Start Program in EEPROM ;($doo) clr COPCTL ;disable watchdog lds #USER_STACKTOP ;load stackpointer

  15. The Debugger • Dbug12 • Simple command line interface • Load – load into ram – use send file • <register name> print out or change register value • g <address>, start execution at <address> • br <address>, nobr set, remove breakpoints • mm <address>, mmw <address> modify memory • md <address>, display address. • tr trace • help , get command list

  16. Parallel IO • Most ports can be used as GPIO • Use port name to access • LDAA porta • STAA porta • DDR determines position • MOVB #$FF,ddrb ;makes port B output • MOVB #0,ddrb ;make port B input

  17. Serial IO • Must set up baud rate and format

  18. Baud Rate Registers

  19. Other Control Registers Selects 8, no parity, one stop Set to 1 to enable transmit and receive Used for interrupt driven IO

  20. Status Register Ready to send Must read before every send Input present Must read before receive

  21. Data register

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