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Embedded Implementation of Power System Monitoring Algorithms. Raymond McNamara , 09505075 Electrical Energy Systems FYP Presentation , January 2013. Introduction. Develop & implement numerous algorithms in real-time for monitoring and control of power systems.
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Embedded Implementation of Power System Monitoring Algorithms Raymond McNamara, 09505075 Electrical Energy Systems FYP Presentation, January 2013
Introduction • Develop & implement numerous algorithms in real-time for monitoring and control of power systems. • Artificial signal generation on Matlab. • Compare filter-bank approaches with spectral analysis approaches.(Performance and complexity) • Port and evaluate the algorithm to a suitable real-time embedded platform. • Develop & evaluate functionality for a suitable closed-loop control algorithm in Matlab. • Port & evaluate closed-loop control algorithm to real-time embedded platform.
Research • Lookingatlimits of class C equipment(Lightingequipment) • Accuracy of 1% replicatingthat of the ADE7880 EnergyMeter Reference: www.ieee.li
Filter Bank Approach Fast Fourier Transform method
Notch Filter • Added to remove the peakat the first harmonic component with magnitude 1. >>freqz(Numerator Coefficients, Denominator Coefficients) Transfer function for the filter:
Second order system IIR filter(Resonator) • Filterseachharmonicseparately. • Removes gain. • First 2000 samplesremoved due to filterimplementation. Transfer function for the filter: 50 Hz Gain removed =1 1000 Hz 1950Hz
Fast Fourier transform Method • Zero-paddingwithnextnearest power of 2 greaterthan the number of original samples ( 66536 instead of 51000).
Performance and Computational Complexity • Assuming 5 seconds and 51000 samples. (5 x 51000) = 255,000. • Notch & IIR Filter – 6 & 4 multiplies and 4 & 2 adds.(1 & 39 harmonicsrespectively) =1 (255,000x6)+39(255,000x4)mul & 1 (255,000x4) & 39(255,000x2)adds. • Total = 41310000 + 20910000= 62,220,000. • FFT and inverse= 2(2Nlog2N) = 18,319,340 • Multiplication : 4N = 1,020,000 • Total = 19339340. • Savingof 68.9% with FFT
Future Plans • Sort out Zero-paddingwithin the FFT to make the algorithim more efficient with the DSP chip. • Select a DSP chip thatwill have the capability of handling the data. • Hopefully all goingwell, implement a closed control loop to monitor and adjust.
Conclusion • For futher information about the project: http://harmonicalgorithm.wordpress.com/ • Thankyou for your time and I hopeyou have enjoyed the presentation. • AnyQuestions?