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3rd Annual SFR Workshop & Review, May 24, 2001. 8:30 – 9:00 Research and Educational Objectives / Spanos 9:00 – 9:45 CMP / Doyle, Dornfeld, Talbot, Spanos 9:45 – 10:30 Plasma & Diffusion / Graves, Lieberman, Cheung, Haller 10:30 – 10:45 break
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3rd Annual SFR Workshop & Review, May 24, 2001 8:30 – 9:00 Research and Educational Objectives / Spanos 9:00 – 9:45 CMP / Doyle,Dornfeld, Talbot, Spanos 9:45 – 10:30 Plasma & Diffusion / Graves, Lieberman, Cheung, Haller 10:30 – 10:45 break 10:45 – 12:00 Poster Session / Education, CMP, Plasma, Diffusion 12:00 – 1:00 lunch 1:00 – 1:45 Lithography / Spanos, Neureuther, Bokor 1:45 – 2:30 Sensors & Controls /Aydil, Poolla, Smith, Dunn, Cheung, Spanos 2:30 – 2:45 Break 2:40 – 4:30 Poster Session / all subjects 3:30 – 4:30 Steering Committee Meeting in room 373 Soda 4:30 – 5:30 Feedback Session
Lithium Batteries for Powering Sensor Arrays Nelson Chong, Jimmy Lim, Jeff Sakamoto and ProfBruce Dunn UCLA Since November 2000: Developed Inorganic/Organic nanocomposite electrolyte Well behaved conductivity to 125oC Batteries with nanocomposite electrolyte operate at 125oC Batteries with Silicon lids Epoxy attachment demonstrated Plasma assisted approach designed
Higher Operating Temperature Electrolyte Replaced polymer electrolyte with Inorganic/Organic Nanocomposite sRT = 7 x 10-4 S/cm s125C = 6 x 10-3 S/cm Unique microstructure SiO2/PMMA network provides rigidity, thermal stability Li+ electrolyte confined in fine pores Well behaved conductivity characteristics to 125oC
Batteries Fabricated with Nanocomposite Electrolyte Operation at Room Temperature 0.05 mA discharge 30 min Operation at 125oC Thermal Cycling • Batteries cycle nicely and exhibit very good capacity • Batteries operate well at 125oC • Thermal cycling between RT and 125oC doesn’t influence capacity
Silicon Lids Incorporated in Battery Encapsulation • Epoxy attachment • (Spanos, Poolla) • Plasma assisted bonding • (Cheung)
Silicon Lid Attached by Epoxy 2 mA discharge
Progress vs. Milestones Develop Thermally Robust Electrolyte• Nanocomposite approach gives 125oC• Batteries demonstrate operation/survivability at 125oC Next:•Higher temperature nanocomposite• Batteries to operate at 2 mA discharge Incorporate Silicon Lid into Battery Encapsulation• Temperature testing of battery with epoxy-attached lid• Plasma-assisted bonding
Spatially Resolved Heat Flux Sensoron a Silicon Wafer for Plasma Etch Processes Mason Freed, Costas Spanos, Kameshwar Poolla Berkeley, CA 2001 GOAL: Design, build, and test an array of heat flux sensors on a silicon wafer, with external electronics.
Motivation • Plasma etch processes etch rate, selectivity, and anisotropy • Highly sensitive to wafer temperature • Heat delivered to the wafer from • ion flux bombardment : physical • exothermic etch reactions : chemical • Very difficult to separately measure these heat components spatially resolved • Need to use wafer-mounted sensors
Sensor Geometry: Modified Gardon Gauge T D sensitivity depends on diameter squared heat flux Heat flow Membrane, thickness w b Antenna Incident heat q Membrane Sink Sink T
Discrimination of Ionic / Chemical Heating • Use two heat flux sensors, one with an exposed layer of etched material and the other covered • Place sensors in Wheatstone bridge arrangement: • antenna structure keeps this added material from adversely affecting the sensitivity Router,exposed Router,covered Rinner,covered2 Vchem Vphys + – + – Rinner,exposed Rinner,covered Router,covered2
First Process – High Built-In Stress Gradient Warped Antenna Etch Holes Membrane
Second Process • Moved to poly antenna structure, from previous aluminum/oxide/photoresist stack • Enlarged wires to allow better printability • Switched to wet Aluminum etchant, to avoid aluminum/poly selectivity problem with Cl-based plasma etch • Modified layout to place etch holes closer together, and more evenly spaced • Modified layout to allow better matching between the inner and outer temperature-sense resistors
Problems Solved Next: Demonstrate heat flux sensor in plasma etch environment, with external electronics, by 9/30/2002. Design wireless heat flux sensor wafer and demonstrate it in plasma etch environment, by 9/30/2003.
Electrical Impedance Tomographybased Metrology Michiel Krüger, K. Poolla, C. Spanos Berkeley, CA 2001 GOAL: to demonstrate the feasibility of off-line metrology based on electrical impedance tomography by 9/30/2001.
Problem formulation and motivation • Obtain spatial and temporal information of wafer state during processing, ex: • Etch rate/uniformity across wafer • Plasma induced potential on wafer surface • Wafer surface temperature • Motivation: • Spatial and temporal wafer state information provide useful information about process uniformity. • This information can be used for: • Diagnostics (drifts, detection of process instabilities) • Design (electrode configuration in plasma tools) • Control (to reduce process variability)
Our Approach • Start with “sensor wafer” with a thin conductive layer on a dielectric film • Conductivity of wafer surface is function of wafer state • Electrical measurements made from pads at wafer edge • Data used to infer spatially resolved film conductivity • Conductivity profile used to deduce wafer state Original conductivity distribution Potential distribution due to forced current flow through object
Advantages • Simple to Make and Use • Sensor wafer requires minimal processing • Thick film technology could be used • Simple electronics • Can be integrated with on-board power and data storage/communications • General Technique with many applications • Etch rate/uniformity sensor, plasma induced potential at wafer surface, temperature at wafer surface • Problem reduces to inverse problem in electrical impedance imaging
W W Electrode I Equipotential line Electrical Impedance Tomography (EIT) • Basic idea: • Force fixed current through interior W of an object from electrodes at the edge W • Reconstruct conductivity profile from measurements of potential u on the boundary W of object • From Maxwell’s equation: •(su)=0 • Widely used in • biomedical applications • geology • non-destructive product testing
doped Poly-Si Al electrode Oxidized wafer Implementation: etch rate/uniformity • Conductivity of doped Poly-Si function of thickness • Etch rate (thickness) variations result in nonuniform conductivity • Simple process flow • Oxidize wafer • Deposit Poly-Si and pattern • Deposit Al and pattern • Easy to test in XeF2 etcher
plasma gate + + + + drain source source drain Si gate oxide Vgs < Vt , 0 Vgs > Vt , = f(Vgs) Al electrode Al gate Implementation: plasma potential • Design, fabricate and test etch rate sensor with temperature compensation, by 9/30/2002. • Design, fabricate and test plasma potential sensor, by 9/30/2003.
On-Wafer Ion Flux SensorsTae Won Kim,Saurabh Ullal, and Eray AydilUniversity of California Santa BarbaraChemical Engineering Department • Variation of ion bombardment flux and its spatial distribution with plasma conditions is critical to plasma etching. • Ion flux uniformity at the wafer determines the uniformity of etching and etching profile evolution. • There have been almost no measurements of the ion flux or ion flux distribution across the wafer as a function of both r and q in realistic etching chemistry. • Design, build and demonstrate an on-wafer ion flux analyzer with external electronics capable of mapping J+ (r,q) on a wafer.
On-Wafer Ion Flux Sensors Milestones • September 30th, 2001 • Build and demonstrate Langmuir probe based on-wafer ion flux probe array using external electronics. • September 30th, 2002 • Build and demonstrate 8” on-wafer ion flux probe array in industrial plasma etcher with external electronics. • September 30th, 2003 • Integration of Si-based IC with sensor arrays. Characterize and test integrated MEMS ion sensor array. ( with Poolla)
Summary of Progress and Research Activities • Designed and build an on-wafer ion flux probe array with external electronics and data acquisition on 3” and 8” wafers. • Demonstrated the use of these arrays for • mapping ion flux uniformity in an Ar plasma. • measuring spatio-temporal variation of the ion flux in presence of a plasma instability. • Completed preliminary experiments in a commercial reactor with 8” wafers. • Tae Won Kim has been at Lam Research in Fremont since March 2001 to implement the probe array on 8” wafers to collect data Lam TCP 9400Reactor and will stay there through the summer and may be the rest of 2001.
On-Wafer Ion Flux Probe Array • 10 probes on 3” wafer • Evaporated metal on PECVD SiO2 on Si wafer. Lines insulated by PECVD SiO2 • External Electronics based on National Instruments SCXI platform • The array is scanned at a rate of 1000 Samples/sec (100 Samples/probe/sec) • Lab View Interface
Plasma Instability: J+ (r,q,t) t = 1.5 s t = 0 s t = 3.2 s t = 4.5 s
200 mm on-wafer ion flux sensors • Ion flux uniformity was measured in a LAM TCP 9400 reactor to demonstrate the probe operation. (50 sccm He, 300 W, 30 mTorr.
Specific Goals • Modify data acquisition to be used with rf bias on the electrostatic chuck. • Use the probe array to study the factors that affect the plasma and etching uniformity in Cl2/O2 etching of Si. • Specifically, the goal will be to understand the role of • etching products • the wall conditions • feed gas composition
Microstructures for PECVD Temperature Mapping Dwight Howard, Eunice Lee, Scott D. Collins and Rosemary L. SmithMicroInstruments and Systems Laboratory (MISL)UC Davis Small Feature Reproducibility: film thickness uniformity is critical Uniformity depends on spatial control of: • plasma composition (gas flow rates and pressure) • plasma energy (power) • substrate surface Temperature -- Project Goals -- Design, fabricate and test thin film microstuctures for mapping surface temperature during PECVD, for process monitoring. • minimize tool hardware modifications • process compatibility • low cost manufacture, and data retrieval
Milestones(1 year project) • September 30th, 2001 • To test thin film resistor sensor array in PECVD. • To design and fabricate MEMS sensor array to record surface temperature variations. • Bench test MEMS array
Thin Film Temperature (T) SensorMetal, thin film, bilayer resistors 500Å Al 500Å Cr SiO2 Silicon Al/Cr or Al/PolySi Resistor Effect: permanent change in R vs. T Mechanism: interdiffusion, alloying, or annealing
Al/Cr Resistors 2nd Phase Formation at T = 290 C R/R0 10 1.3 8 1.25 6 1.2 1.15 4 1.1 2 1.05 1 1.0 130 150 170 190 210 230 250 270 290 310 330 350 Temperature (C)
Temperature Mapping Demonstration Al/Cr Resistors, 120 nm PECVD Si3N4 Al/Cr 312 < T < 330
Al/PolySi R vs. T 5 min 10 min 20 min
Al / PolySi Temp Map 100 nm PECVD Si3N4 Degrees, C 400 350 300 250 Platen T=300C 300 < T < 380 C
MEMS Thermal Actuator(work in progress) Aluminum, 1 mm Cantilever Beam Example Silicon, 2 mm Silicon Thermal expansion coefficient mismatch --> strain --> displacement T1 >T0 TC>T1 T= T0 • TC depends on geometry of cantilever. • Array of microstructures designed to have varying TC. • Readout can be optical imager.. in situ or post processing.
Layer Transfer Technology for Micro-System IntegrationChanghan Yun, Yonah Cho, Adam Wengrow, and Nathan CheungBerkeley, CA Detector Sensor array Electronics Interconnects Battery Photon emitters Resonators Low-Temperature assembly process enables integration of dissimilar microsystems (embedded photon emitter, energy source, sensors, electronics)
LED Array Transfer with Laser Liftoff 2. Laser Liftoff (LLO) 1. Bond receptor onto GaN sapphire 3. Acetone bath 4. Bond to any substrate Thermal detachment (~40°C) Interfacial decomposition receptor wafer adhesive adhesive LED Si Al2O3 Laser beam Transfer of LED layers from sapphire to silicon or plastic substrate
Blue LED Transferred on Silicon Substrate From a distance Under a microscope probe tip probe tip No luminosity degradation after layer transfer!
2002 and 2003 Goals Summary of Progress and Research Activities • 2001-2002 • Incorporate light emitting devices on sensor wafers • Demonstrate layer transfer for subsystem encapsulation (e.g. batteries) • 2002-2003 • Design interconnection schemes between the dissimilar microsystems • Demonstrate integration of signal and data processing systems with photonics and MEMS • Low-temperature Si layer transfer using mechanical cleavage (see poster for details) • Wafer-scale transfer of quantum-well GaN LED arrays onto Si substrate with no degradation of luminosity and device performance
Removal rate Slurry state Pad state Topography Comprehensive Simulation Tool for CMP processesCarlo Novara, Kameshwar Poolla, Costas Spanos • Build MATLAB based CMP model Pad pressure Spin speeds Slurry comp Pad state Initial topography CMP Process Parameter tuning & adaptation RTR Metrology Tools
Motivation & Approach • Model uses • OEM : internal diagnostics, design, sensitivity assessment • Production: maintenance scheduling, recipe optimization • The Challenge • Complexity: large numbers of unmeasurable parameters in model need to be estimated from data and tuned periodically • Limited availability of metrology to tune model • Approach • Evaluate sub-system sensitivity with simulation studies to drive model reduction => fewer parameters • Confirm sensitivities experimentally
Research Plan • Focus on Copper process • 8/01 – basic model in place • 1/02 – sensitivity studies complete • 8/02 – data driven model validation
Model-based Diagnosis Real-time equipment model Diagnostic Engine Real time monitoring of key equipment variables processing equipment
Hardware Setup in the Berkeley Microlab Workstation SECII Lam 9400 OES sensor Z-scan sensor
Wafer State Modeling of Uniformity & Etch Rate: combined sensor signals give the best results
Future Directions in Diagnosis • Deploy automated fault detection system using high sampling rate RF fingerprinting. • Study automated generation of syntactic analysis rules for RF fingerprinting. • Study systems of real-time instability detection and plasma stabilization control; • Perform field studies of automated OES classification for fault diagnosis.
Mask 90%CD Resist ARC Polysilicon 50%CD Si Oxide Silicon Substrate 10%CD Side Wall Angle (SWD) Lithography Process Monitoring through CD Profile Metrology Inputs Inputs Range Exposure Dose 10-15 (mJ/cm²) Focus Position -0.3-0.5(um) 04-0.7 Partial Coherence 54-66 (sec) PEB Time 130-136 (°C) PEB Temperature Outputs: 10%CD 50%CD 90%CD SideWallAngle
350 300 exposure dose increase 250 50% CD (nm) 200 150 100 0 200 400 600 800 1000 1200 1400 1600 1800 2000 # of data point Simulated Data from PROLITH • Use PROLITH to replace experimental data • Advantage: convenient for generating large number of data of different recipes required by model development • Disadvantage: not exactly the same as a real process, must be tuned by experimental data in practice.
Some Diagnostic Results (Time Series Estimation) 1st order autoregressive model All other parameters are fixed and known Exposure use the same model as above. Focus is fixed but unknown, other input parameters are fixed and known