1 / 14

VLSI

VLSI. Acronym of VLSI V ery- L arge- S cale I ntegration A VLSI contains more than a million or so switching devices or logic gates Early in the first decade of the 21 st century, the actual number of transistors has exceeded 100 million

palmer-duncan
Download Presentation

VLSI

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. VLSI • Acronym of VLSI • Very-Large-Scale Integration • A VLSI contains more than a millionor so switching devices or logic gates • Early in the first decade of the 21st century, the actual number of transistors has exceeded 100 million • A piece of silicon (a chip) is typically about 1centimeter on a side

  2. VLSI • Very Large Scale Integration • design/manufacturing of extremely small, complex circuitry using modified semiconductor material • integrated circuit (IC) may contain millions of transistors, each a few mm in size • applications wide ranging: most electronic logic devices

  3. Integrated Circuits • Digital logic is implemented using transistors in integrated circuits containing many gates. • small-scale integrated circuits (SSI) contain 10 gates or less • medium-scale integrated circuits (MSI) contain 10-100 gates • large-scale integrated circuits (LSI) contain up to 104 gates • very large-scale integrated circuits (VLSI) contain >104 gates

  4. Integrated Circuits • Improvements in manufacturing lead to ever smaller transistors allowing more per chip. • >107 gates/chip now possible; doubles every 18 months or so • Variety of logic families • TTL - transistor-transistor logic • CMOS - complementary metal-oxide semiconductor • ECL - emitter-coupled logic • GaAs - gallium arsenide

  5. IC Product • Processors • CPU, DSP, Controllers • Memory chips • RAM, ROM, EEPROM • Analog • Mobile communication,audio/video processing • Programmable • PLA, FPGA • Embedded systems • Used in cars, factories • Network cards • System-on-chip (SoC) Images: amazon.com

  6. Choice of Technology • Two distinct types of technology are fabricated in silicon based upon • BJT (Bipolar Junction Transistor) • MOS (Metallic Oxide Semiconductor) • Since processing of these technologies is very different, it isimpractical to mix them up within a chip

  7. Choice of MOS and BJT • MOS logic occupies much smaller area of silicon than the equivalent BJT logic • MOS technology has a much higher potential packing density • A MOS logic circuit requires appreciably less current and hence less power than its bipolar counter part • However, bipolarcircuits operate faster than MOS circuits • Even so, the speed-power product for MOS logic compares favorably with that of BJT logic

  8. Choice of MOS and BJT • The structure of an MOS transistor is much simpler than that of bipolar devices and this makes manufacturing process easier • This in turn should result in fewer faults occurring in fabrication (high yield) • Dynamic logic circuits cannot be implemented in bipolar technology • Thus in terms of area, power dissipated, yield and flexibilityMOS technology is superior to BJT

  9. Moore’s Law • Moore’s Law: • The number of transistors on an integrated circuit will double every 18 months • The level of integration of silicon technology as measured in terms of number of devices per IC • This comes about in two ways – size reduction of the individual devices and increase in the chip or dice size

  10. Moore’s Law Source: Intel web page (www.intel.com)

  11. VLSI Design Flow RTL module AddAccm (A, B, clk, out, reset); input[15:0] B; output[15:0] A,out; Input clk, reset; reg[15:0] Ar, Br, out; always @(posedge clk or posedge reset) begin if (reset = = 1) begin Ar=0; Br=0; end else begin Br = B; Ar = out; end end always @(Ar or Br) out = Ar + Br; endmodule netlist Placed & Routed layout

  12. System Blocks Gates Transistors Silicon VLSI Hierarchy in Design Cost increases Complexity increases Verification Effort increases

More Related