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ELEC 5200-001/6200-001 Computer Architecture and Design Spring 2009 Introduction. Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 http://www.eng.auburn.edu/~vagrawal vagrawal@eng.auburn.edu. Course Webpage.
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ELEC 5200-001/6200-001Computer Architecture and DesignSpring 2009Introduction Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 http://www.eng.auburn.edu/~vagrawal vagrawal@eng.auburn.edu ELEC 5200-001/6200-001 Lecture 3
Course Webpage • http://www.eng.auburn.edu/~vagrawal/COURSE/E6200_Spr09/course.html • Alternatively, • Go to professor’s webpage http://www.eng.auburn.edu/~vagrawal/ • Click on ELEC5200-001/6200-001 Computer Architecture and Design, MWF 11AM, Broun 306 ELEC 5200-001/6200-001 Lecture 3
Course Organization • Text book: D. A. Patterson and J. L. Hennessy, Computer Organization & Design, the Hardware/Software Interface, Fourth Edition, San Francisco, California: Morgan Kaufman Publishers, Inc., 2008, ISBN 978-0-12-374493-7. • Instructor: Vishwani D. Agrawal, Broun 323, x41853, vagrawal@eng.auburn.edu. • Graduate Assistant: Manish Kulkarni, MWF 10:00-11:00AM, Broun 359, 334-332-0556, mmk0002@auburn.edu. • Classroom: Broun 306, MWF 11:00-11:50AM. • Lab: Broun 320. ELEC 5200-001/6200-001 Lecture 3
Author of the Text Book Communications of the ACM, Volume 49, No. 4, April 2006, Page 31 ELEC 5200-001/6200-001 Lecture 3
Author of the Text Book ELEC 5200-001/6200-001 Lecture 3
Student Performance Evaluation • Homeworks (25%): 1 per week, most weeks. • Two Class Tests (25%): • Test 1, date to be announced, 11:00-11:50AM, Broun 306. • Test 2, date to be announced, 11:00-11:50AM, Broun 306. • CPU Design Project (25%). • Final Exam (25%): Wedesday, May 6, 2009, 12-2:30PM, Broun 306. • Class Presentation on assigned topic by ELEC6200 Students; “Satisfactory” grade necessary; attendance necessary for ELEC5200 students. ELEC 5200-001/6200-001 Lecture 3
Course Objective • Learn what a digital computer contains and how it works. • Learn design concepts of a modern computer. • Gain design experience (through project). ELEC 5200-001/6200-001 Lecture 3
The Concept of a Computer Application software Systems software User Hardware Operating system compiler assembler Programs user writes and runs ELEC 5200-001/6200-001 Lecture 3
Software Compiler Assembler Application software, a program in C: swap (int v[ ], int k) {int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } MIPS compiler output, assembly language program: swap; muli $2, $5, 4 add $2, $4, $2 lw $15, 0 ($2) lw $16, 4 ($2) sw $16, 0 ($2) sw $15, 4 ($2) jr $31 MIPS binary machine code: 00000000101000010000000000011000 00000000000110000001100000100001 10001100011000100000000000000000 10001100111100100000000000000100 10101100111100100000000000000000 10101100011000100000000000000100 00000011111000000000000000001000 Application software Systems software See pages 122-123 Hardware ELEC 5200-001/6200-001 Lecture 3
The Hardware of a Computer Input Control Datapath Memory Central Processing Unit (CPU) or “processor” Output Application software Systems software Hardware FIVE EASY PIECES ELEC 5200-001/6200-001 Lecture 3
Instruction Set Architecture (ISA) • A set of assembly language instructions (ISA) provides a link between software and hardware. • Given an instruction set, software programmers and hardware engineers work more or less independently. • ISA is designed to extract the most performance out of the available hardware technology. Application software Systems software Instruction set Software Hardware Hardware ELEC 5200-001/6200-001 Lecture 3
ISA • Defines registers • Defines data transfer modes between registers, memory and I/O • Types of ISA: RISC, CISC, VLIW, Superscalar • Examples: • IBM370/X86/Pentium/K6 (CISC) • PowerPC (Superscalar) • Alpha (Superscalar) • MIPS (RISC and Superscalar) • Sparc (RISC), UltraSparc (Superscalar) ELEC 5200-001/6200-001 Lecture 3
Computer Architecture • Architecture: System attributes that have a direct impact on the logical execution of a program • Architecture is visible to a programmer: • Instruction set • Data representation • I/O mechanisms • Memory addressing ELEC 5200-001/6200-001 Lecture 3
Computer Organization • Organization: Physical details that are transparent to a programmer, such as • Hardware implementation of an instruction • Control signals • Memory technology used • Example: System/370 architecture has been used in many IBM computers, which widely differ in their organization. ELEC 5200-001/6200-001 Lecture 3
Architecture and Organization ISA Hardware Engineers Software Programmers ELEC 5200-001/6200-001 Lecture 3
CPU Design Project • Design and implementation of a processor: • Define instruction set • Design datapath and control hardware • Implement hardware in FPGA • Verify ELEC 5200-001/6200-001 Lecture 3
Research and Development of Continuing Interest • Instruction level parallelism (ILP) • Multi-core processors and Chip multi-processing (CMP) • Energy efficiency and low power design • Embedded systems • Network processing ELEC 5200-001/6200-001 Lecture 3
Summary • A computer processes digital data. • A user solves a problem by writing and/or running a program written in a high-level programming language like C. • Inside computer, system programs called compiler and assembler break the user program down into assembly code (instruction set) and then into binary machine code. • The machine code is processed by the 5-piece hardware (control unit, datapath, memory, input and output) to obtain the desired result. ELEC 5200-001/6200-001 Lecture 3