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ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs

ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs. Lecture #6 Agenda Today Assembly Language (Assembler Fields and Directives) Listing Files ADR vs LDR Instruction Encoding/Decoding. Assembler Fields. MSP432/ARM Cross-Assembler

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ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs

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  1. ECE 3430 – Introduction to Microcomputer SystemsUniversity of Colorado at Colorado Springs Lecture #6 Agenda Today • Assembly Language (Assembler Fields and Directives) • Listing Files • ADR vs LDR • Instruction Encoding/Decoding ECE 3430 – Intro to Microcomputer Systems Fall 2015

  2. Assembler Fields MSP432/ARM Cross-Assembler • The MSP432/ARM cross-assembler takes assembly source code and translates it to machine code that the MSP432/ARM understands. The assembler is run on a standard PC. • The cross-assembler reads the text file (*.s file) and decodes the text depending on which column the text is in. There are four columns that are called assembler fields: 1) Label (optional) 2) Opcode/Instruction Mnemonic (must be white space in front) 3) Operand (any required machine code operands) 4) Comment (usually after a semi-colon) ECE 3430 – Intro to Microcomputer Systems Fall 2015

  3. Assembler Fields Label Field • Text that is not preceded by a white space character (i.e., the first character of a line) is treated as a label. A label is a piece of text that gets assigned the memory address of where it is located in the file. • Useful for giving global variables (or peripheral registers) a name. Global variables are memory locations in RAM. • Also useful for flagging the destination line for a branch instruction. • Different assemblers will put different restrictions on what characters can be used in a label. • Some assemblers allow for an optional colon (:) after the label and some don’t. Labels may or may not be case-sensitive depending on the assembler and settings. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  4. Assembler Fields Opcode/Mnemonic Field • Text that is proceeded by 1 group of white space (or a tab) is treated as an opcode/mnemonic. • Only instruction mnemonics (or assembler directives) can be used in this field. If the assembler does not recognize the mnemonic (it doesn’t exist), it will present an error. • Example mnemonics: MOV, LDR, STR, ADD, … • See MSP432/ARM Instruction Set Summary for a list of all mnemonics. Operand Field • Text that follows a mnemonic is treated as an operand (3rd column) MOV R0, #0x0280 Operands ECE 3430 – Intro to Microcomputer Systems Fall 2015

  5. Assembler Fields Comment Field • Comments are used to make notes about what you are doing. You must comment your code in the lab if you expect the lab instructors to help you. • There are a couple of ways to enter a comment: • The fourth column of the text file is treated as a comment field. Place a semicolon (;) in front of the comment to make it readable and ensure the assembler treats what follows it as a comment. The assembler disregards comments because they are only for the programmer’s use and are no use to the assembler. Ex) MOV R4,#0x55 ; this instruction initializes 0x55 into R4 and zeroes ; out the upper 24 bits • Placing a semicolon (;) as the first character of a line. The entire line is treated as a comment. Ex) ; start of code ; Start MOV R4,#0x55 ; this line will be skipped by the assembler ECE 3430 – Intro to Microcomputer Systems Fall 2015

  6. Assembler Directives Source Code – When you write a program, you will include additional information besides just CPU instructions. Sometimes the assembler needs more information: 1) Where in memory should the program be loaded? 2) Memory allocation for program data 3) Variable names 4) Global constants 5) Et cetera Directives - We accomplish the above using assembler directives. The assembler directives are specific to the cross- assembler. The assembler recognizes directives as keywords and knows what to do. Directives are not CPU instructions! ECE 3430 – Intro to Microcomputer Systems Fall 2015

  7. Assembler Directives Two-Pass Assembler - A cross-assembler reads in the source file in at least two passes (scans the input file twice). Depending on how an assembler or a compiler is written, it may do more than two passes. The two-passes might be as follows: 1st Pass: - Assembler directives concerning program location are decoded and memory locations are setup. - Labels, constants, and variable names are resolved and stored in memory.2nd Pass - Opcode / operands are decoded and given a memory location of where they are to be downloaded. - Labels, constants, and variable names are substituted in. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  8. Assembler Directives Examples of directives: DCB : declare constant byte (8-bit, use in non-volatile memory) DCW : declare constant word (16-bit, use in non-volatile memory) DCD : declare constant double (32-bit, use in non-volatile memory) SPACE : reserve space for variable (any size, use in volatile memory) EQU : equate two things AREA : describes the attributes of the following section of the file IMPORT : get a symbol from another file EXPORT : export a symbol to another file ALIGN : insert padding as necessary to meet alignment criteria THUMB: tell assembler to use the Thumb instruction set exclusively END : file is done—ignore anything that comes after it ECE 3430 – Intro to Microcomputer Systems Fall 2015

  9. Assembler Directives There are directives to declare: • Control placement of code/data (using AREA). • Declare constants of various sizes (using DCB/DCW/DCD). • Reserve space for a global variable (using SPACE). • Initialize constant character strings (using DCB). • Et cetera. Assembler directives are very specific to the assembler you are using—while the machine code lines are specific only to the target architecture. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  10. Listing Files Listing files are generally optional output from assembler, sometimes useful in debugging. With a rich debugging environment, directly looking at listing files is not always required. In any listing file, multiple columns of data are appended to the left of the original assembly source code and may contain: • Line number • Address in memory • Opcode • Operands • Cycle count for instruction Format and amount of output data depend on the tools. In ARM, items 3 and 4 are grouped together into the Instruction Code. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  11. IDE for Debugging The IDE can host a debugging session against simulated or real hardware. During debugging, the debugger can provide the following: • Source window code stepping (assembly or higher-level). • Reverse assembly if debugging higher-level code. • Memory contents (RAM and Flash). • CPU register contents. • Stack contents  Function/Subroutine call-stack. • Use of breakpoints. • Code re-direction (skipping/repeating lines of code). • … ECE 3430 – Intro to Microcomputer Systems Fall 2015

  12. ADR vs LDR As mentioned before, in any ARM-based processor, not any arbitrary constant can be initialized into a CPU register. To initialize a register to the address of a variable, either of the following instructions can be used: Using LDR with special syntax can be used: LDR R0, =VarName ; This way will always work at potentially the cost ; of another memory load cycle. But ADR can also be used: ADR R0, VarName ; This is the preferred way (no extra memory load ; cycle involved). But range is limited. In both cases, R0 gets the same value—but how it goes about getting the constant is different. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  13. Putting it all together ; Constants and declarations (these do not occupy any memory in the uC) P4IN EQU 0x40004C21 P4OUT EQU 0x40004C23 P4DIR EQU 0x40004C25 Const EQU 0x12345678 THUMB ; Place all the following in RAM (read/write and volatile) AREA DATA Glob1 SPACE 4 ; 32-bit variable Glob2 SPACE 2 ; 16-bit variable Glob3 SPACE 1 ; 8-bit variable ; Place all the following in Flash (read-only and non-volatile) AREA |.text|, CODE, READONLY, ALIGN=2 Start MOV R0, #0x12 ; Arbitrary program code here… … Done B Done Const2 DCD 0x9ABCDEF0 ; 32-bit constant Const3 DCW 0x5555 ; 16-bit constant String DCB “Hello World” ; ASCII string ALIGN END ECE 3430 – Intro to Microcomputer Systems Fall 2015

  14. Instruction Encoding/Decoding Reference the Thumb-2 Instruction Set Architecture PDF on the course web page. The ARM instruction set is somewhat straightforward to encode and decode. In that instruction set, all instruction codes are 32 bits wide. The Thumb and Thumb-2 instruction sets are additions to the ARM instruction set to attempt to compress instructions into a smaller space. All Thumb instructions are 16-bit and Thumb-2 instructions are mostly 16-bit with some 32-bit codes. Thumb and Thumb-2 use holes the ARM opcode map to provide abbreviated encodings. For this reason, the encoding and decoding Thumb is a little convoluted to do by hand (as you will see when you study the encoding). In this class, we will probably only focus on a set of simpler examples. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  15. Instructions are Pipelined The ARM Cortex-M4F that is contained in the MSP432 uC has a three-stage pipeline: • Fetch • Decode • Execute Once the pipeline is full, most instructions take 1 cycle to complete. The main consequence of the pipelining is that the PC will be ahead of the actual instruction that is completing. The pipelining is generally transparent to the programmer—but when encoding instructions that are PC-relative, you have to know where the PC is. When branches are taken (as opposed to skipped), the pipeline may have to be flushed. Our ARM processor has a branch predictor circuit that guesses whether the branch will be taken or not—but sometimes guesses wrong. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  16. Conditional Instructions The standard ARM instruction set allows virtually all instructions to be conditional: ADDEQ R0, R1, R2 ; R0 = R1 + R2 iff (Z == 0) The Thumb and Thumb-2 instruction set does not define this behavior. Our ARM Cortex processor only understands Thumb—so these conditional qualifiers are off-limits. If you use them, the assembler will generate an error. The purpose of having conditional qualifiers on most instructions is to avoid compare/branch combinations and minimize the likelihood that the CPU pipeline will need to be flushed. ECE 3430 – Intro to Microcomputer Systems Fall 2015

  17. Instruction Encoding/Decoding [In-class example of Thumb-2 encoding for MOV, LDR, STR, CMP, B*, ADD, SUB instructions.] [See link to example on course web page.] ECE 3430 – Intro to Microcomputer Systems Fall 2015

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