1 / 28

State of the art in FPGA technology

State of the art in FPGA technology. Jecel Assump ção Jr LCR - ICMC - USP São Carlos. topics. Xilinx vs Altera Bit players Rookies Alternatives. First FPGA (1985) Sells US$1.7B/year. First reprogrammable logic device (1984) First CPLD (1988) Sells US$1.2B/year. Xilinx vs Altera.

prue
Download Presentation

State of the art in FPGA technology

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. State of the art in FPGA technology Jecel Assumpção Jr LCR - ICMC - USP São Carlos

  2. topics • Xilinx vs Altera • Bit players • Rookies • Alternatives

  3. First FPGA (1985) Sells US$1.7B/year First reprogrammable logic device (1984) First CPLD (1988) Sells US$1.2B/year Xilinx vs Altera

  4. High End = Virtex 1998 1999 E 2000 II 2002 II Pro 2004 4 LX/SX/FX 2006 5 LX/LXT/SXT 2008 5 FXT/TXT 2009 6 High End = Stratix 2002 2003 GX 2004 II 2005 II GX 2006 III 2008 IV E 2008 IV GX Xilinx vs Altera

  5. Low End = Spartan 1998 1999 II 2001 IIE 2003 3 2005 3E 2006 3A 2007 3AN/3A-DSP 2009 6 Low End = Cyclone 2003 2004 II 2007 III 2009 IV Xilinx vs Altera

  6. Xilinx vs Altera

  7. Bit player: Lattice • ECP3 - lowest cost FPGA with SERDES • XP2 - 90nm Flash • Also ECP2, ECP2M and SC

  8. Bit player: Actel • Igloo and ProASIC3 - low power • SmartFusion and Fusion - mixed signal • RTAX, RTProASIC3 and RTSX - radiation tolerance • Axcelerator, SX-A, eX and MX - antifuse

  9. Bit player: QuickLogic • Customer Specific Standard Products (CSSPs)

  10. Bit player: Atmel • Legacy devices - AT6000 • AT40KAL + AVR8 = FPSLIC (Field Programmable System Level Integrated Circuits)

  11. Edinburgh • 1985 to 1988 - three generations of CAL up to CAL256 • 1989 - Algotronix formed, CAL1024 • 1993 - bought by Xilinx: XC6200 • Very popular for research, but not commercially

  12. Imperial College

  13. Rookie: Silicon Blue • Classic architecture • Low power • Low cost • Internal Flash

  14. Rookie: Achronix • 1.5GHz • picoPIPE assynchronous internal architecture • SERDES • DDR3 controllers

  15. Rookie: Tabula • 1.6GHz with 8 multiplexed designs • 48 SERDES • 5.5MB RAM • 220K to 630K logic cells

  16. Rookie: Tier Logic

  17. Alternative: eASIC • Standard Cell ASIC-like unit cost, power consumption performance and density • Low up-front development cost • Simple, FPGA-like design flow • Device turnaround in only 4-6 weeks

  18. Alternative: Stretch Inc

  19. Alternative: Trips

  20. Alternative: Xmos

  21. Alternative: MathStar

  22. Alternative: Tilera

  23. Alternative: Stream Processors Inc

  24. Thanks!

  25. references • http://www.xilinx.com/ • http://www.altera.com/ • http://lms.nthu.edu.tw/sys/read_attach.php?id=17968 • http://ce.et.tudelft.nl/FPL/trimbergerFPL2007.pdf • http://www.fpga-guide.com/overview_frame.html

  26. references • http://www.latticesemi.com/ • http://www.actel.com/ • http://www.quicklogic.com/ • http://www.atmel.com/ • http://www.algotronix.com/people/tom/album.html • http://www.doc.ic.ac.uk/~ipage/papers/cam95.pdf

  27. references • http://www.siliconbluetech.com/ • http://www.achronix.com/ • http://www.tabula.com/ • http://www.tierlogic.com/

  28. references • http://www.easic.com/ • http://www.stretchinc.com/ • http://userweb.cs.utexas.edu/~trips/ • http://www.xmos.com/ • http://www.mathstar.com/ • http://www.tilera.com/ • http://www.streamprocessors.com/

More Related