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DAC Interfacing. V ref. CPU. D Q. DAC. D Q. V out. Clock. Address bus. Address decoder. IOW. AEN. Data bus. Address bus. IBM – PC Ports. MEMR MEMW IOR IOW. R/W IO/M DEN. DEN. ALE. OUT DX,AL OUT DX,AX. 300H - 31FH For prototype Cards.
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DAC Interfacing V ref CPU D Q DAC D Q V out Clock Address bus Address decoder IOW AEN
Databus Address bus IBM – PC Ports MEMR MEMW IOR IOW R/W IO/M DEN DEN ALE OUT DX,AL OUT DX,AX 300H - 31FH For prototype Cards AEN=0 For I/ O ports A9 A5 A4 A1 A0 AEN=1 For DMA For Card For Port For Byte Selection Selection Selection
Address Decoder 300 – 31 FH decoder IOR decoder IN 300H A1 A2 A3 A4 A5 A6 A7 IN 302H IN 304H OUT 300H A1 A2 A3 A4 OUT 302H OUT 304H A9 A8 AEN IOW
Mov Cx, count * OUT Dx, AL Mov AL, SI INC SI ”LODSB“ “OUT DX,AX” For 10- bit or 12- bit DAC Or “LODSW” DEC CX JNZ * ” * LOOP“ Mov BL , M **DEC BL JNZ ** Delay to adjust “ Ts”
D0 10 – bit DAC D0 D1 D1 D2 D2 D7 D7 D0 D0 D1 A0 CE D1 A0 OUT 300H Vout
V ref ADC VIN CPU data bus Start IN 300H END DO OUT 302H IN 302H
** OUT 302H, AL * IN AL, 302 H AND AL, 1 JNZ * IN AL, 300H STOSB LOOP ** Delay to adjust Ts
Start End interrupt CPU V cc INTR D Q Elk clr End Int. service routin OUT 304H, AL IN AL, 300H STOSB OUT 302H, AL IRET Out 304 H
IN AX, 300H STOSW 10-bit ADC B0 B1 D0 D1 V in B7 B0 B1 D7 D0 D1 A0 OE A0 IN 300H