Band 5, 6 & 7 LO Development for FIRST Imran Mehdi SWAT Team, JPL

1. Band 5, 6 & 7 LO Development for FIRST Imran Mehdi SWAT Team, JPL Technology design and development philosophy New Technology Development--Neal Erickson Base-line plan Plan implementation Critical technologies 2.5THz circuits and beyond--Peter Siegel Presented at the FIRST PDR, JPL, Feb. 1-3, 1999

2. Over-all design philosophy Team effort--UMass, RPG, VMI, Millitech, JPL Neal Erickson (UMass) Dave Potterfield (Virginia Millimeter-wave Inc.) Israel Galin (Aerojet) Peter Zimmermann (RPG) Erich Schlecht, Peter Siegel, Imran Mehdi (JPL) ,Alain Maestrini, Frank Maiwald (JPL by March 1999) Focus on repeatable, reliable, and robust processes Use of proven planar technology Implement planar technology for higher frequencies Whisker contacted circuits to be backup

3. LO Table for FIRST

4. JPL will implement bands 5,6, & 7 preferably with all planar diodes in waveguide technology The UMass balanced doubler design(and variations thereof) will be used as the baseline for up to 450 GHz A new circuit/device integration approach will be investigated for the frequency range between 450 and 1000 GHz UMass planar tripler to be investigated The membrane-diode technology will be the baseline for f >1000 GHz

5. Progress at University of Mass. Dr. Neal Erickson

6. Micro-milling machine (from Neal Erickson) A complete milling machine has been built using precision positioners and high RPM spindles. Capable of milling, drilling and broaching (scraping) with several tools in a single set-up. Not equivalent to any commercially available machine. Full computer control of all operations. 4 complete 800 GHz triplers have been machined, with accuracy of 0.3 mils (worst case). Primary errors are due to temperature variation. Machining time for a complete tripler (2 halves) is 3 hours, beginning with just an accurate block with screw holes. Machined features have extremely accurate profiles, well defined edges, and excellent surface finish. All of the programming and machining on the triplers was done by an operator withlittle machining experience. With better temperature control, this mill should be capable of machining devices at 1.5 THz of similar complexity.

7. Planar Balanced Tripler (from Neal Erickson) Blocks for balanced triplers for 280 and 320 GHz are designed and largely machined. Diodes ready for installation. Tripler is a prototype, with 10% bandwidth. Greater bandwidth should be possible. Predicted efficiency is much larger than any single diode tripler due to improved 2nd harmonic idler circuit. Design is scalable to at least 1 THz with membrane diode fabrication.

8. Planar Balanced Doublers Planar doubler built covering 130-165 GHz with typically 25% efficiency fixed-tuned using 4 diode array (Pin = 120 mW). 6 diode array (SB8T2) designed at UMass and fabricated at UVa has produced 80 mW output at 140 GHz (room temp). Input power is 270 mW. Survived this drive level for several days without damage. Efficiency at lower input power is 34%. Diode was designed to handle very high power while maintaining a good power balance between the anodes. Intended for good wideband impedance match, will require a new block design. Bandwidth in the existing block is not known, since the best operation occurred with the lowest frequency source available. Better methods of assembly have improved the ability of the diodes to survive veryhigh input power without failure.

9. 270 GHz doubler using JPL diodes has produced 14 mW output with a Gunn oscillator pump. Input power is poorly calibrated (no input isolator), expected to be below 55 mW, efficiency exceeds 25%. Diode from the same batch showed an increase in relative efficiency of 35% at 77K,  cold efficiency for this doubler should exceed 34%.

10. Cascaded pair of doublers for 325-336 GHz produced a peak output of 7.2 mW, with typical input power of 150 mW. Uses UVa diodes made a few years ago, SC6T6 and SB3T2. Second stage efficiency (using a SB3T2) is 19% at 328 GHz, greatly exceeds best previous results. New doubler circuits much better optimized for these diodes, have significantly lower circuit loss because they do not require tunable backshorts or extra tuners.

11. Preliminary design of a doubler using existing EOS-MLS mixer diode shows problems with easy-to-build design. Full height (2 mil high) waveguide for the output circuit leads to very narrow band input and output match (band too narrow to predict frequency). Wideband circuit will require waveguide reduced below 1 mil height, should be practical, but requires development of new cutting tools. Present diodes may not fit an optimized circuit well, may delay first test of band 6b doubler. Membrane diode doubler for 2.5 THz

12. Isolators desired between multiplier stages for minimal interactions over a wide band. Wideband Faraday rotation isolators have been built for 85-115 GHz having typical loss of 0.8 dB at room temp. Best device had 0.6 dB maximum loss. No change in tuning at 77 K, but loss typically decreases to 0.4 dB. 35 devices have been built, about half are this good. Ferrite loss may be variable, generally low loss when cold. Same design works well in 110-170 GHz (WR6) band, with max loss of 1.5 dB at room temp. Minimum loss 1.0 dB. 2 devices built. Loss of WR6 model also decreases cold, by approximately a factor of 2. Fabrication of similar isolators up to 350 GHz seems practical with low loss. May require careful selection of ferrite batch. Isolators (From Neal Erickson)

13. Progress at JPL Erich Schlecht Jean Bruston Peter Siegel Peter Smith Ray Tsang Imran Mehdi & Dr. David Porterfield Virginia Millimeter-wave Inc.

14. Millitech designed/built multipliers

15. Millitech Multipliers

16. Millitech design double doubler x2x2

17. FIRST Circuits Potterfield design (92-106) x2 • UVa 6-anode chip • 250 mW input power • Peak output--50 mW • Peak efficiency--25%

18. Potterfield design (92-106) x2

19. Latest results from the 184-212 block(from Dave Porterfield)

20. Design of the 380-420 doubler block To be inserted

21. Substrate-less circuit technology Description and pictures to be inserted

22. Technology development plan-Band 5 Balanced planar doubler Proven n >28% Planar doubler Proven n >15% RPG whisker tripler ? UMass planar tripler ? Membrane tripler ? HBVs?

23. Technology development plan-Band 6 To be inserted

24. Technology development plan-Band 7 To be inserted

26. Waveguide block fabrication for 300 GHz < f < 900 GHz Plan: JPL will be purchasing two micromachining cells Backup: commercial vendors ? Block assembly for f<500 GHz Plan: EOS-MLS expertise to be availed Backup: none Phase shifters/tuners Plan: TBD Backup: TBD Low loss isolators Plan: commercial vendor up to 200 GHz, Extensive computer simulations that would perhaps enable us to match the different stages well. Backup: No isolators List of critical technologies and risk mitigation plans

27. Feed-horns for f > 500 GHz Plan: JPL process Backup: commercial contracts Planar Technology for 320 < f < 1 THz Substrate-less approach Membrane technology Bump-bonding Backup:Whiskers, scaling THz Triplers InGaAs varactors HBVs Planar Tripler Membrane technology Backup: Whiskers List of critical technologies and risk mitigation plans

28. Block fab and assembly for f > 500 Plan: micro-machining cell, micro-fabrication technologies Backup: commercial vendors ? Cryogenic testing Plan: Utilize expertise from the cryo-technologists at JPL Backup: none List of critical technologies and risk mitigation plans

29. Monolithic Membrane Diode (MoMeD) Tripler for 2400-2700 GHz Aram Arzumanyan Suzanne C. Martin Imran Mehdi R. Peter Smith Peter H. Siegel

30. Concept: Single and Antiparallel-pair varistor diode triplers utilizing JPL monolithic membrane diode (MoMeD) circuit/devices in fix-tuned electroformed waveguide mount with in-line input/output waveguides and integral feed horn Implementation: Three device configurations (single mask set): (a) Antiparallel-pair diode tripler - common-biased, natural even harmonic reject (b) Single diode tripler - external bias, internal 1st, 2nd, 3rd harmonic matching (c) Antiparallel-pair diode tripler - separately biased to adjust turn on knee (Pin) Progress to date: Passive circuit elements & filters designed/analyzed with FDTD (linear response) 6-to-18 GHz 135X scale model completed & under test with actual scaled diodes First round device processing to begin mid December RF block layout complete, fabrication of waveguides to begin mid December

31. MoMeD model with cover removed showing membrane filter, input and output waveguides. 135X scale model of Band 6b tripler Left: Close-up of scaled antiparallel pair Schottky beam lead diodes on scaled MoMeD filter

32. 0 dB 0 dB Input band Output band -10 dB -10 dB 1000 GHz 2000 GHz 3000 GHz 750 GHz QuickWave FDTD simulation of coupling from 50 source to output waveguide QuickWave FDTD simulation of coupling from input waveguide to 50 load

33. Mechanical drawing of MoMeD tripler's electroformed RF insert. Visible are the in-line input/output waveguides, GaAs membrane diode and support frame and output feedhorn

34. Rotation Test System and Beam Pattern of Electroformed 2.5 THz Pickett-Potter Feed Horn Horn used on 2.5 THz MoMeD mixer. Data courtesy Mike Gaidis-JPL Linear Power: 1 at center, 0.1 at outer contour

35. Summary Preliminary design of Band 6b multiplier is nearly completed. Three separate diode implementations will be realized: 2 balanced antiparallel-pair configurations & 1 single diode realization FDTD simulations show fix-tuned bandwidth of 2400-2700 GHz is possible Scale model measurements using actual diodes will be used to check the analysis Additional analysis using nonlinear diode models is planned (MAFIA) Device and RF circuit fabrication are planned to begin within the next two months