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Logic Gates. Chapter 3. Introduction to VHDL. Entity. Describes all inputs and outputs Every VHDL design must has at least one entity Requires the use of Identifiers for naming the entity itself as well as the inputs and outputs Entity is a keyword and is reserved in VHDL for this purpose.
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Logic Gates Chapter 3
Entity • Describes all inputs and outputs • Every VHDL design must has at least one entity • Requires the use of Identifiers for naming the entity itself as well as the inputs and outputs • Entity is a keyword and is reserved in VHDL for this purpose
Identifiers • User defined names used to identify VHDL elements and units • Two types of identifiers • Basic identifiers • Extended identifiers
Identifiers • A basic identifier consists only of lowercase letters or uppercase letters, numeric digits and single underscores. Upper and lower case can be mixed • A letter must be used as the first symbol in an identifier name • Basic identifiers must not contain spaces • VHDL Keywords or reserved identifiers may not be used as identifiers • Appendix X lists VHDL keywords and reserved identifiers
Entity declaration entity <entity identifier> is port (signal identifier); end entity <entity identifier> entity OR_1 is port (A,B: in bit; X: out bit); end entity OR_1
Port Statement • A port is an input or output signal • port is a VHDL keyword • The port statement must specify the port identifier, the port direction, and the port data type • 3 port directions in, out, inout • Many data types one of which is bit • bit has two values, 0 and 1
port (A, B: in bit; X: out bit); • Two input ports A and B • One output port X • Port assignments are enclosed by parentheses • Port statement ends with a ; • Direction of port is in or out • Bit is the data type
Architecture • Architecture declaration is where the operation of the logic function is specified • For each entity there must be a corresponding architecture • Each architecture must be associated by name with an entity
Architecture architecture < architecture name> of <entity name> is begin The description of the logic function goes here end architecture <architecture name Example: architecture ORfunction of OR_1 is begin X <= A or B end architecture ORfunction;
Program for 2-input OR gate -- Program for 2-input OR gate entity OR_1 is port (A,B: in bit; X: out bit); end entity OR_1 architecture ORfunction of OR_1 is Begin X <= A or B end architecture ORfunction;
Programming • VHDL comments are proceeded by two dashes - - • Data flow descriptions • X <= A data associated with A is assigned to X • Behavioral description is used when a logic function to too complex for data flow approach. Example, an inverter would be • X <=‘1’ when (A=‘0’) else ‘0’ Note typo on page 165.
Logical Operators Table 3-13, Page 165
Program for 3-input AND gate -- program for 3-input AND gate entity AND_gate is port (A, B, C,: in bit; X: out bit); end entity AND_gate architecture ANDfunction of AND_gate is Begin X <= A and B and C; end architecture ANDfunction
Program for 4-input NAND gate -- program for 4-input NAND gate entity NAND_gate is port (A, B, C,D: in bit; X: out bit); end entity NAND_gate architecture NANDfunction of NAND_gate is Begin X <= ((A nand B) nand C) nand D; --X<=not (A and B and C and D); end architecture NANDfunction Example 3-28, Page 166
Boolean Algebra and Logic Simplification Chapter 4
Laws and rules of Boolean Algebra In Algebra you learned rules or laws. For example the Commutative law of addition A + B = B + A where A and B are any whole number (in 6th grade) where A and B are any real number (in 9th grade) In 1860 George Boole developed an Algebra where A and B were only allowed to be true or false. This is called Boolean Algebra and is used in Digital electronics.
Boolean Algebra laws and rules are similar to the Algebra of 9th grade but only 1 or 0 is allowed for the variables Boolean Addition is the logical OR function X=A + B Boolean Multiplication is the logical AND function X = AB
Commutative law of addition Commutative law of addition A+B = B+A the order of ORing does not matter. X = Y
Commutative law of Multiplication Commutative law of Multiplication AB = BA the order of ANDing does not matter. X = Y
Associative law of addition Associative law of addition A + (B + C) = (A + B) + C The grouping of ORed variables does not matter X = Y
Associative law of multiplication Associative law of multiplication A(BC) = (AB)C The grouping of ANDed variables does not matter X = Y
Distributive Law A(B + C) = AB + AC A B C X Y X=Y
Distributive Law (A+B)(C+D) = AC + AD + BC + BD A BCDXY X=Y
A+0=A In math if you add 0 you have changed nothing in Boolean Algebra ORing with 0 changes nothing A X X=A
A+1=1 ORing with 1 must give a 1 since if any input is 1 an OR gate will give a 1 A X X=1
A•0=0 In math if 0 is multiplied with anything you get 0. If you AND anything with 0 you get 0 A X X=0
A•1 =A ANDing anything with 1 will yield the anything A X X=A
A+A = A ORing with itself will give the same result A A X A=A
A+A=1 Either A or A must be 1 so A + A =1 A A X X=1
A•A = A ANDing with itself will give the same result A A X A=A
A•A =0 In digital Logic 1 =0 and 0 =1, so AA=0 since one of the inputs must be 0. A A X X=0
A = A If you not something twice you are back to the beginning A X X=A
A + AB = A A B X
A + AB = A + B If A is 1 the output is 1 If A is 0 the output is B ABXY X=Y
(A + B)(A + C) = A + BC A B C X Y
Section 4-3 De Morgan will help to simplify digital circuits using NORs and ANDs his theorem states A • B = A + B and A + B = A • B if more than 2 variables are used follow the same pattern
This should show That both circuits have the same output De Morgan was right they are the same
Look at A +B +C + D = A • B • C • D This is the same too
(A + B)(CD) = A + B + CD = A + B + CD X and Y are the same
X = A + B C + CD + B = A + B C CD + B = A + B C (CD + B) = A B C (C +D +B) = A B C C + A B C D +A B B C = A B C D Now to check our work
Boolean Analysis of Logic Circuits The purpose of this section is to practice changing gates to simplified Boolean Algebra expressions. Gates to Boolean is done one gate at a time starting at the inputs Simplification of the Boolean is done using the Boolean Laws and rules. We will also cover making gates from Boolean expressions