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Chapter 2: Boolean Algebra and Logic Functions

Chapter 2: Boolean Algebra and Logic Functions. CS 3402-- Digital Logic Design. Boolean Algebra. Algebraic structure consisting of: a set of elements B operations {AND, OR} Notation: X AND Y X • Y XY X OR Y X+Y

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Chapter 2: Boolean Algebra and Logic Functions

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  1. Chapter 2: Boolean Algebra and Logic Functions CS 3402-- Digital Logic Design CS 3402:A.Berrached

  2. Boolean Algebra Algebraic structure consisting of: • a set of elements B • operations {AND, OR} • Notation: X AND Y X • Y XY X OR Y X+Y • B contains at least two elements a & b such that ab • Note: switching algebra is a subset of Boolean algebra where B={0, 1} Axioms of Boolean Algebra 1. Closurea,b in B, (i) a + b in B (ii) a • b in B 2. Identities: 0, 1 in B (i) a + 0 = a (ii) a • 1 = a 3. Commutative Laws: a,b in B, (i) a + b = b + a (ii) a • b = b • a 4. Associative Laws: (i) a + (b+c) = (a+b)+c = a+b+c (ii) a. (b.c) = (a.b).c = a.b.c 5. Distributive Laws: (i) a + (b • c) = (a + b) • (a + c) (ii) a • (b + c) = (a • b) + (a • c) 6. Existenceof the Complement: exists a’ unique in B (i) a + a’ = 1 (ii) a • a’ = 0 a’ is complement of a CS 3402:A.Berrached

  3. Principle of Duality Definition of duality: • a dual of a Boolean expression is derived by replacing AND operations by ORs, OR operations by ANDs, constant 0s by 1s, and 1s by 0s (everything else is left unchanged). Principle of duality:if a statement is true for an expression, then it is also true for the dual of the expression Example: find the dual of the following equalities 1) XY+Z = 0 2) a(b+c) = ab + ac CS 3402:A.Berrached

  4. Boolean Functions • A Boolean function consists of an algebraic expression formed with binary variables, the constants 0 and 1, the logic operation symbols, parenthesis, and an equal sign. • Example: F(X,Y,Z) = X + Y’ Z or F = X + Y’ Z • X, Y and Z are Boolean variables • A literal: The appearance of a variable or its complement in a Boolean expression • A Boolean function can be represented with a truth table • A Boolean function can be represented with a logic circuit diagram composed of logic gates. CS 3402:A.Berrached

  5. T 1 T 2 From Boolean Expression to Gates More than one way to map an expression to gates E.g., Z = A' • B' • (C + D) = (A' • (B' • (C + D))) A Z B C D A B Z C D For each Boolean function, there is only one unique truth table representation =>Truth table is the unique signature of a Boolean function CS 3402:A.Berrached

  6. Description T ruth T able Z = 1 if X is 0 X Y Z or Y is 0 0 0 1 0 1 1 1 0 1 1 1 0 Description T ruth T able Z = 1 if both X X Y Z and Y are 0 0 0 1 0 1 0 1 0 0 1 1 0 Boolean Functions Possible Boolean Functions of Two variables Gates X NAND Z Y Gates NOR X Z Y CS 3402:A.Berrached

  7. Basic Logic Functions: NAND, NOR • NAND, NOR gates far outnumber AND, OR in typical designs • easier to construct in the underlying transistor technologies • they are functionally complete • Functionally Complete Operation Set: • A set of logic operations from which any Boolean function can be realized (also called universal operation set) • E.g. {AND, OR, NOT} is functionally complete • The NAND operation is also functionally complete • => any Boolean function can be realized with one type of gate (the NAND gate). • The NOR operation is also functionally complete CS 3402:A.Berrached

  8. Basic Logic Functions: XOR, XNOR • XOR: X or Y but not both ("inequality", "difference") • XNOR: X and Y are the same ("equality", "coincidence") CS 3402:A.Berrached

  9. Logic Functions: Rationale for Simplification • Logic Minimization: reduce complexity of the gate level implementation • reduce number of literals (gate inputs, circuit inputs) • reduce number of gates • reduce number of levels of gates • fewer inputs implies faster gates in some technologies • fan-ins (number of gate inputs) are limited in some technologies • Fewer circuit inputs implies fewer I/O pins • fewer levels of gates implies reduced signal propagation delays • number of gates (or gate packages) influences manufacturing costs • In general, need to make tradeoff between circuit delay and reduced gate count. CS 3402:A.Berrached

  10. Simplification Using Boolean Algebra Useful Theorems of Boolean Algebra: 1. Idempotency Theorem a. X + X = X b. X • X = X 2. Null elements for + and • operators a. X + 1 = 1 b. X . 0 = 0 3. Involution Theorem (X’)’ = X 4. Absorption Theorem a. X + XY = X b. X.(X+Y) = X 5. Simplification Theorem a. XY + XY’ = X b. (X+Y).(X+Y’) = X 6. Another Simplification Theorem a. X + X’Y = X + Y b. X.(X’ + Y) = X.Y CS 3402:A.Berrached

  11. DeMorgan's Theorems 7. DeMorgan’s Theorem a. (X+Y)’ = X’ . Y’ b. (X.Y)’ = X’ + Y’ • The complement of the sum is the product of the complements • The complement of the product is the sum of the complements In general a. (A+B+….+Z)’ = A’ . B’ . … .Z’ b. (A.B.C….Z)’ = A’ + B’ + ….+Z’ CS 3402:A.Berrached

  12. DeMorgan's Theorem (X + Y)' = X' • Y' NOR is equivalent to AND with inputs complemented (X • Y)' = X' + Y' NAND is equivalent to OR with inputs complemented • DeMorgan’s Law can be used to get the complement of an expression • {F(X1,X2,...,Xn,0,1,+,•)}' = {F(X1',X2',...,Xn',1,0,•,+)} • Example: • F = A B' C' + A' B' C + A B' C + A B C' • F' = (A' + B + C) • (A + B + C') • (A' + B + C') • (A' + B' + C) CS 3402:A.Berrached

  13. Function Representations • Truth Table (Unique representation) • Boolean Expressions • Logic Diagrams From TO Boolean Expression ==> Logic Diagram Logic Diagram ==> Boolean Expression Boolean Expression ==> Truth Table Truth Table ==> Boolean Expression CS 3402:A.Berrached

  14. Function Representations • F(X,Y,Z) = X + Y’Z + X’Y’Z + X’Y’Z’ CS 3402:A.Berrached

  15. Deriving Boolean Expression from Truth Table CS 3402:A.Berrached

  16. Product and Sum Terms --Definitions Definitions: • Literal: A boolean variable or its complement X X’ A B’ • Product term: A literal or the logical product (AND) of multiple literals: X XY XYZ X’YZ’ A’BC Note: X(YZ)' • Sum term: A literal or the logical sum (OR) of multiple literals: X X’+Y X+Y+Z X’+Y+Z’ A’+B+C Note: X+(Y+Z)' CS 3402:A.Berrached

  17. SOP & POS -- Definitions • Sum of products (SOP) expression: The logic sum (OR) of multiple product terms: AB + A’C + B’ + ABC AB’C + B’D’ + A’CD’ • Product of sums (POS) expression: The logic product (AND) of multiple sum terms: (A+B).( A’+C).B’.( A+B+C) (A’ + B + C).( C’ + D) Note: SOP expressions ==> 2-level AND-OR circuit POS expressions ==> 2-level OR-AND circuit CS 3402:A.Berrached

  18. Minterms & Maxterms -- Definitions Definitions • A Minterm: for an n variable function, a minterm is a product term that contains each of the n variables exactly one time in complemented or uncomplemented form. Example: if X, Y and Z are the input variables, the minterms are: X’Y’Z’ X’Y’Z X’YZ’ X’YZ XY’Z’ XY’Z XYZ’ XYZ • A Maxterm: for an n variable function, a maxterm is a sum term that contains each of the n variables exactly one time in complemented or uncomplemented form Example: if X, Y and Z are the input variables, the maxterms are: X’+Y’+Z’ X’+Y’+Z X’+Y+Z’ X’+Y+Z X+Y’+Z’ X+Y’+Z X+Y+Z’ X+Y+Z CS 3402:A.Berrached

  19. Minterms • For functions of three variables: X, Y, and Z • The bit combination associated with each minterm is the only bit combination for which the minterm is equal to1. • Example: X'Y'Z' = 1 iff X=0, Y=0, and Z=0 • Each bit represents one of the variables ( order is important) : • Un-complemented variable ==> 1 • Complemented variable ==> 0 CS 3402:A.Berrached

  20. The bit combination associated with each Maxterm is the only bit combination for which the Maxterm is equal to 0. • Note: The ith Maxterm is the complement of the ith minterm; That is Mi = mi Maxterms CS 3402:A.Berrached

  21. Standard (Canonical) forms of an expression • A switching function can be represented by several different, but equivalent, algebraic expressions. • The standard form is a unique algebraic representation of each function. • Standard SOP: sum of minterm form of a switching function • Standard POS: the product of maxterm form ofa switching function • Each switching function has a unique standard SOP and a unique standard POS. CS 3402:A.Berrached

  22. Deriving Boolean Expression from Truth Table • Input Output Minterm A B C F term designation 0 0 0 1 A’B’C’ m0 0 0 1 0 A’B’C m1 0 1 0 0 A’BC’ m2 0 1 1 1 A’BC m3 1 0 0 0 AB’C’ m4 1 0 1 0 AB’C m5 1 1 0 0 ABC’ m6 1 1 1 0 ABC m7 F is 1 iff (A=0 AND B=0 AND C=0) or (A=0 AND B=1 AND C=1) F is 1 iff (A’=1 AND B’=1 AND C’=1) or (A’=1 AND B=1 AND C=1) F is 1 iff A’.B’.C’ = 1 OR A’.B.C= 1 F is 1 iff A’B’C’ + A’BC = 1 => F = A’B’C’ + A’BC => F = m0 + m3 Short-hand notation: F = m ( 0, 3) CS 3402:A.Berrached

  23. Sum of minterms form • A Boolean function is equal to the sum of minterms for which the output is one. => the sum of minterms (also called the standard SOP) form Example: F = m ( 0, 3) CS 3402:A.Berrached

  24. Deriving Boolean Expression from Truth Table • Input Output Minterm Maxterm A B C F term Designation term Designation 0 0 0 1 A’B’C’ m0 A + B + C M0 0 0 1 0 A’B’C m1 A + B + C’ M1 0 1 0 0 A’BC’ m2 A + B’ + C M2 0 1 1 1 A’BC m3 A + B’ + C’ M3 1 0 0 0 AB’C’ m4 A’ + B + C M4 1 0 1 0 AB’C m5 A ‘ + B + C’ M5 1 1 0 0 ABC’ m6 A’ + B’ + C M6 1 1 1 0 ABC m7 A’ + B’ + C’ M7 F is 0 iff (A+B+C’) = 0 AND (A+B’+C)=0 AND (A’+B+C)=0 AND (A’+B+C’) =0 AND (A’+B’+C) = 0 AND (A’+B’+C’) = 0 => F = (A+B+C’) . (A+B’+C) . (A’+B+C) AND (A’+B+C’) . (A’+B’+C) . (A’+B’+C’) => F = M1.M2.M4.M5.M6.M7 ==>F =  M(1,2,4,5,6,7) CS 3402:A.Berrached

  25. Product of Maxterms • A Boolean function is equal to the product of Maxterms for which the output is 0. => the product of Maxterms (also called the standard Product of Sums) form Example: F =  M(1,2,4,5,6,7) CS 3402:A.Berrached

  26. Examples: Find the truth table for the following switching functions: • F(A,B,C) = ABC’ + AB’C • F(A,B,C) = AB + A’B’ + AC • F(X, Z) = X + Z’ • F(A,B,C,D) = A(B’ + CD’) + A’BC’ For each of the above functions, find their Standard SOP and POS. CS 3402:A.Berrached

  27. Getting Standard Forms of a Switching Function • F(A,B,C) = AB + A’B’ + AC get standard SOP and POS forms of F Method 1: 1. Derive Truth Table for F 2. Get SOP and POS from truth table Method 2: Use Shannon’s Expansion Theorem CS 3402:A.Berrached

  28. Shannon’s Expansion Theorem a) f(x1,x2,…,xn) = x1.f(1,x2,….,xn) + x1.f(0,x2,…,xn) b) f(x1,x2,…,xn) = [ x1+ f(0,x2,….,xn)] . [ x1.f(1,x2,…,xn)] CS 3402:A.Berrached

  29. Incompletely Specified Functions • The output for certain input combination is not important (I.e. we don't care about it). • Certain input combinations never occur Example: Design a circuit that takes as input a BCD digit and outputs a 1 iff the parity of the input is even. Note: A BCD digit consists of 4 bits CS 3402:A.Berrached

  30. Incompletely Specified Functions Block Diagram W X F Y Z CS 3402:A.Berrached

  31. Incompletely Specified Functions • Truth Table • F = m ( 0, 3, 5, 6, 9)+d(10…15) • F =  M(1,2,4,7, 8)+ d(10…15) CS 3402:A.Berrached

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