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Evaluation of Placement Techniques for DNA Probe Array Layout

Evaluation of Placement Techniques for DNA Probe Array Layout. Andrew B. Kahng 1 Ion I. Mandoiu 2 Sherief Reda 1 Xu Xu 1 Alex Zelikovsky 3. (1) CSE Department, University of California at San Diego. (2) CSE Department, University of Connecticut. (3) CS Department, Georgia State University.

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Evaluation of Placement Techniques for DNA Probe Array Layout

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  1. Evaluation of Placement Techniques for DNA Probe Array Layout Andrew B. Kahng1 Ion I. Mandoiu2 Sherief Reda1 Xu Xu1 Alex Zelikovsky3 (1)CSE Department, University of California at San Diego (2) CSE Department, University of Connecticut (3) CS Department, Georgia State University

  2. Outline Introduction to DNA microarrays and border minimization challenges Previous probe placement algorithm Partitioning-based probe placement Quantified sub-optimality of placement Comparison of probe placement heuristics Conclusions and future research directions

  3. Optical scanning Introduction to DNA Probe Arrays DNA Arrays are composed of probes where each probe is a sequence of 25 nucleotides Tagged fragments flushed over array Laser activation Images courtesy of Affymetrix.

  4. Probe Synthesis A  Mask 1 A A A A A A 3X 3 array CG AC G AC ACG AG AG C CG Nucleotide Deposition Sequence ACG array probes

  5. Probe Synthesis A C C A A C A C A C C A 3X 3 array CG AC G AC ACG AG AG C CG C  Mask 2 array probes Nucleotide Deposition Sequence ACG

  6. Probe Synthesis A C G G C A A C A G C G A C G G C A 3X 3 array CG AC G AC ACG AG AG C CG Nucleotide Deposition Sequence ACG G  Mask 3 array probes A Nucleotide DepositionSequence defines the order of nucleotide deposition A Probe Embedding specifies the steps it uses in the sequence to get placed

  7. Border Minimization Challenges Problem: Diffraction, internal reflection, scattering, internal illumination Occurs at sites near to intentionally exposed sites Lamp Mask Reduce Border  Increase yield  Reduce cost Design objective: Minimize the border Array Intentionally exposed sites Border Unwanted illumination

  8. Border Reduction with Probe Placement T T Optimize A T C C T A T C T C Border = 4 Probe Placement Similar probes should be placed close together T T T G C A A Deposition Sequence T T G C C C A A T T Probes T C C Border = 8

  9. Border Reduction in Probe Embedding Probe Embedding T T G C A A A Deposition Sequence T T T T G Border = 4 Border = 2 C C C A A T Probes A T T C T C Synchronous embedding: deposit one nucleotide in each group of “ACGT” Asynchronous embedding: no restriction

  10. Basic DNA Array Design Flow Design of Test Probes Design of Test Probes BIST and DFT Probe Placement Probe Embedding Physical Design Placement Lithography Lithography DNA Array Routing Probe Selection Probe Selection Logic Synthesis Logic Synthesis BIST and DFT Analogy Probe Placement Placement Physical Design Probe Embedding Routing VLSI Chip

  11. DNA Microarrays Physical Design Problem Give: n2 probes Find: Placement of probes in n x n sites Embedding of the probes Minimize: Total border cost

  12. Outline Introduction to DNA microarrays and border minimization challenges Previous probe placement algorithm Partitioning-based probe placement Quantified sub-optimality of placement Comparison of probe placement heuristics Conclusions and future research directions

  13. Previous Work Border minimization was first introduced by Feldman and Pevzner. “Gray Code masks for sequencing by hybridization,” Genomics, 1994, pp. 233-235 Work by Hannenhalli et al. gave heuristics for the placement problem by using a TSP formulation. Kahng et al. “Border length minimization in DNA Array Design,” WABI02, suggested constructive methods for placement and embedding Kahng et al. “Engineering a Scalable Placement Heuristic for DNA Probe Arrays ,” RECOMB03, suggested scalable placement improvement and embedding techniques

  14. 1-D Probe Placement (TSP) Probe 3 Probe 4 Probe 2 C C C T T T A A T G T T C C T A C C Probe 1 Probe 2 Probe 3 Probe 4 Probe 1 G C C C G C T T T C A T A A A G T G T G C T C C C A C A C A Hamming Distance =4 Hamming Distance (P1, P2) = number of nucleotides which are different from its counterpart = border (synchronous embedding) How to place the 1-D ordering of probes onto the 2-D chip?

  15. Placement By Threading Probe 2 Probe 3 Probe 4 C C C T T T A A T G T T C C T A C C Thread on the chip Probe 1 2 3 G C 4 1 A G C A Optimized Edge Not Optimized Edge

  16. Row-Epitaxial Placement (i, j) Switch For each site position (i, j): Move the best probe to (i, j) and lock it in this position Find the best probe which minimize border

  17. Outline Introduction to DNA microarrays and border minimization challenges Previous probe placement algorithm Partitioning-based probe placement Quantified sub-optimality of placement Comparison of probe placement heuristics Conclusions and future research directions

  18. Basic DNA Array Design Flow Design of Test Probes Design of Test Probes BIST and DFT Probe Placement Probe Embedding Physical Design Placement Lithography Lithography DNA Array Routing Probe Selection Probe Selection Logic Synthesis Logic Synthesis BIST and DFT Analogy Partitioning Probe Placement Placement Physical Design Placement Probe Embedding Routing VLSI Chip Question: Shall we use partitioning in probe placement?

  19. Single Nucleotide Placement A A A A C C C C A A A A C C C C A A A A C C C C A A A A C C C C G G G G T T T T G G G G T T T T G G G G T T T T G G G G T T T T Partitioning Based Placement Border = 32 A A A A A A A A A A A A A A A A C C C C C C C C C C C C C C C C G G G G G G G G G G G G G G G G T T T T T T T T T T T T T T T T Row-Epitaxial Placement Border = 48 Can partitioning based placement achieve improvement for 25-nucleotide probes?

  20. Partitioning Based Placement Choose a probe as seed 4 which has the largest total Hamming distance with seed 1, seed 2 and seed 3. Choose a probe as seed 3 which has the largest total Hamming distance with seed 1 and seed 2. Choose a probe as seed 2 which has the largest Hamming distance with seed 1. Randomly choose a probe as seed 1.

  21. Partitioning Based Placement Level 1 Partition Level 2 Partition Row epitaxial one by one “Border aware”

  22. Outline Introduction to DNA microarrays and border minimization challenges Previous probe placement algorithm Partitioning-based probe placement Quantified sub-optimality of placement Comparison of probe placement heuristics Conclusions and future research directions

  23. 2-D Gray Code Test Case Construction C C A T A A T T A T T A A A T T C G G C T A C C G G G C C G G C n=4 n=2 G G T A For synchronous embedding, Border = 2 for any two neighbor probes.

  24. Scaling Construction A A A C G T C G T A A A A A C C A A G G T T A A A G C T A A G A T C A A A A A C G T C G T A new border Ratio= <1 Solution quality scale well 4(old border) n x n real chip Four isomorphic copies with the same border

  25. Outline Introduction to DNA microarrays and border minimization challenges Previous probe placement algorithm Partitioning-based probe placement Quantified sub-optimality of placement Comparison of probe placement heuristics Conclusions and future research directions

  26. Experiments Setup Chip size range: between 100x100 and 500x500 Type of instances Randomly generated 2-D Gray code Scaled / suboptimality test cases Embedding methods Asynchronous Synchronous Quality measure Gap from lower bound Total border cost CPU Normalized cost All tests are run on Xeon 2.4 GHz CPU.

  27. Comparison of Synchronous Placement Results Borders Gap from lower bound Chip size Chip size CPU Normalized cost Chip size Chip size Partitioning Based (Level=2) TSP + Threading Row Epitaxial Compared with row epitaxial,new method reduce the border cost by 3.7% and is 3 times faster.

  28. Results on 2-D Gray code Test cases 5.6% Borders TSP + Threading Row Epitaxial Recursive Partitioning Chip size Gap from Optimal solution Chip size

  29. Suboptimality Experiments Results 2.5% Borders Row Epitaxial Partitioning Based (Level=2) Chip size Scaling ratio Chip size

  30. Placement Polishing Using Re-Embedding T G G C C C A Deposition Sequence T T G C C A A Perform polishing one by one G C C Probes C T A Border = 8 Border = 4 Use polishing algorithm to re-embed each probe with respect to its neighbors

  31. Comparison of Asynchronous Placement Results Borders Gap from lower bound Chip size Chip size Normalized cost CPU Chip size Chip size Partitioning Based (Level=2) TSP + Threading Row Epitaxial Compared with row epitaxial, new method reduce the border cost by 4% and is 2.65 times faster.

  32. Outline Introduction to DNA microarrays and border minimization challenges Previous probe placement algorithm Partitioning-based probe placement Quantified sub-optimality of placement Comparison of probe placement heuristics Conclusions and future research directions

  33. Conclusions We draw a fertile analogue between DNA array and VLSI Design Automation We propose a new recursive partitioning-based placement algorithm and a new embedding algorithm which achieves 4% improvement We study and quantify the performance of existing and newly proposed algorithms on benchmarks with known optimal cost as well as scaling suboptimality experiments

  34. Open Research Directions Stronger placement operators leading to further reduction in the border cost. Future work also covers next generation chips 10k× 10k. Add flow-awareness to each optimization step and introduce feedback loops. Add the pools of probes taken from probe selection tool.

  35. Thanks for your attention Questions?

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