Da linguaggio C a circuiti FPGA

1. Da linguaggio C a circuiti FPGA Massimo Ancona DISI Università di Genova Testi: Altera Nios II C2H Compiler User Guide J. L. Tripp et al., Trident: From High-Level Language to Hardware Circuitry, IEEE Computer March 2007.

2. C2H Chap. 3 The C2H Compiler translates each element of C syntax to an equivalent hardware structure using straightforward mapping rules. The mapping rules provide a one-to-one association between elements of C syntax and their equivalent hardware structures. By learning the C-to-hardware mappings, you can control the hardware structure of an accelerator, based on the structure of the C code. The C2H Compiler can perform resource-sharing optimizations which reduce the resource utilization for an accelerator. In these cases, the result is a better than one-to-one mapping.

3. C2H: Arithmetic and Logical Operators Every arithmetic and logical operator in the C code translates to a corresponding hardware block in the accelerator. Consider the function MAC() shown in Example Example 3–1. Function with Arithmetic and Logical Operators long long MAC (int* a, int* b, int len) { long long result = 0; while (len > 0) { result += *a++ * *b++; len--; } return result; }

4. C2H: Arithmetic and Logical Operators

5. Hen 93 Assignments A C assignment operator stores the value of an expression to a variable. As a general rule, every assignment operator in the C code, such as =, translates to a registered signal in hardware. The value of an assignment's expression is calculated in one clock cycle. Figure 3–1 shows the hardware that results from the following statement: int sum = x + y;

6. Hen 93 • Assignments that use multiple registers to pipeline complex arithmetic operations The following sections discuss these exceptions. Unregistered Operations and Assignments Certain logical and bit-wise operations involving constants are trivial and require no logic. In hardware, they are performed simply by manipulating wires. Table 3–2 lists the applicable operators and conditions. If an assignment consists solely of such operations, then its result is not registered.

7. Table 3–2. Operators That Can Result in Unregistered Assignments

8. Table 3–2. Operators That Can Result in Unregistered Assignments The following assignment is an example of a zero logic-element operation. int masked_data = data_in & 0x000fffff; The C2H Compiler generates no register for the variable masked_data, because its value is represented simply by concatenating 12 bits of zeroes with the lower 20 bits of data_in. Additional examples of unregistered assignments are listed below: shift_by_constant = data_in << 3; or_with_constant = data_in | 0xf0f0f0f0; invert_shift_and_consts = (~data_in & 0xff) << 8;

9. Pipelined Operations and Assignments The C2H Compiler always registers the results of the operators listed in Table 3–3. Some arithmetic operations, such as multiplication, use a large amount of logic, which creates a significant propagation delay through the circuit. Calculating these operations in series with other operations in a single clock cycle would incur unacceptable propagation delays and significantly reduce the maximum achievable clock frequency (fMAX) for the system. The C2H Compiler pipelines these operations by giving each its own registered assignment. There are exceptions for cases in which an operation reduces to trivial logic, as listed in Table 3–3

10. Table 3–3. Complex Arithmetic Operations Pipelined by C2H

11. Hen 93 Figure shows the circuit that results from the following code: if (foo > bar) foo += bar; else foo *= bar;

12. Hen 93 Figure 3–5 shows the circuit that results from the following code: if (foo > bar) foo += bar;

13. Hen 93 Conditional Operator ?: The ?: (conditional) operator is functionally equivalent to the if-else statement, but the placement of registers is different. The condition logic and selection logic compute in the same clock cycle, and the result is Figure shows the circuit that results from the following code: foo = (foo > bar) ? (foo + bar) : (foo * bar);

14. Hen 93 Definizione Un grafo di intervalli proprio (proper interval graph) e’ un grafo di intervalli in cui nessun intervallo e’ contenuto propriamente in un altro. Definizione Un grafo di intervalli unitario (unitary interval graph) e’ un grafo di intervalli in cui ciascun intervallo e’ di lunghezza unitaria. Teorema. La classe dei grafi di intervalli unitari coincide con la classe dei grafi di intervalli propri.

15. Hen 93 Teorema Sia G un grafo non orientato. Le seguenti affermazioni sono equivalenti: • G e’ un grafo di intervalli • G non contiene cicli lunghi 4 privi di corde (cordless 4-cycles); il grafo G complementare di G (*) e’ un grafo di comparabilita’ (comparability graph). • I clique massimali (maximal cliques) di G possono essere ordinati linearmente in modo tale che per ogni vertice x di G, i clique massimali di G contenenti x appaiono consecutivamente. Corollario Un grafo non ordinato G e’ un grafo di intervalli se e solo se e’ triangolato e il suo grafo compementare G e’ un grafo di comparabilita’ (comparability graph). Definizione Un grafo di comparabilita’ e’ un grafo…

16. Hen 93

17. Hen 93 Chaitin riconduce il problema dell’allocazione dei registri ad un problema di colorazione del grafo di interferenza. Un vertice del grafo ha grado k se ha k vertici vicini (direttamente ad esso connessi) Il metodo di Chaitin colora con m colori il grafo con la proprietà che due vertici adiacenti abbiano colori diversi. Una colorazione del grafo di interferenza con k colori definisce una soluzione feasible con k registri