Innovative Architecture Design Process

1. Memory Sybsystem Design Measures Customized Memory Subsystem Compiler Automated Design Selection Optimized Processor Architecture Design Workload Design Space Novel Optimizations Customized Datapath Design Constraints Performance, Power, Size, and Cost DatapathDesign Measures The Past The Future Innovative Architecture Design Process • The compiler optimization is now a tool for designing workload specific architectures • The traditional role of an optimizing compiler is for a fixed ISA • Automated Design space exploration based on quantitativemeasures to find the best-fit design constraints • Multivariate analysisto properly exercise a workload and prune the design space (Charles Hardnett) Ad-hoc Art To An Engineering Science Human designbased onbenchmarks Automatedexploration andarchitecture synthesis based on quantitativemeasures Customized Memory Subsystem Data remapping halves the cache requirements as well as the power consumed Low NRE Fast-time-to-market High NRE Slow-time-to-market Customized Datapath Match the computation needs of the application to the resources in an architecture optimized workloadspecific design Krishna V. Palem and Rodric M. Rabbah Center for Research on Embedded Systems and TechnologyGeorgia Institute of Technology This work is supported by DARPA contract No. 25-74100-F0944