Pyxis

1. Pyxis Aaron Martin April Lewis Steve Sherk

2. Pyxis1600 • General-purpose 16-bit RISC microprocessor • 16 16-bit registers • 24-bit address bus • Up to 16MB of addressable memory Pyxis1600

3. Registers • 16 registers • 3 special purpose • $r0 – zero • $r14 – stack pointer • $r15 – return address • 13 general purpose • $r1 - $r13 • Status register (sr) • 8 bits – carry (c), overflow (o), negative (n), zero (z), interrupt enable (i), less than (l), 2 bits unused • Program counter (pc) • Accumulator high (ah) and accumulator low (al) • Used for multiply and divide • Page register (pr) • Sets the high order 8 bits in the 24-bit address space Pyxis1600

4. Instruction Formats 15 9 8 7 4 3 0 R-type • 16-bit instructions • 7-bit opcode • 1 bit to indicate information in next word • rd is source and target • rs is source • Branch instructions use special format opcode ext rd rs 15 0 Displacement / Immediate 15 13 12 9 8 0 B-type opcode branch type address Pyxis1600

5. Instruction Set Pyxis1600

6. Instruction Set Pyxis1600

7. Addressing Modes • Register direct • Register indirect plus displacement • Use r0 for absolute addressing • PC-relative • Immediate Pyxis1600

8. Interrupts • Options for handling interrupts • Handled by hardware • Each interface wired to its own pin • Handled by software • Use interrupt vector that points to different routines • Have separate priority level for each interface • All interrupts go to same routine that polls each device to see which one caused the interrupt Pyxis1600

9. Control ALU PC Block Diagram Major Components Instruction [15:8] Read / Write Register Instruction [7:4] Instruction [3:0] Read Register Memory Registers Instruction Register 15 8 7 4 3 0 Pyxis1600

10. Sub-systems • Internal to the microprocessor • Fetch and Memory access logic • addressing modes • ALU • add, sub, mult, div, memory access calculations (PC+offset) • Control logic • micro instructions, control signal labels • Register implementation • External • Serial bus implementation • hardware associated with serial port Pyxis1600

11. Assembler • Converts assembly code into machine language • Uses a look-up table to find machine code for each instruction • Some instruction are “psudo-instructions” implemented with other, lower level instructions • Written in Perl and implemented on a PC • Perl is good for parsing and string manipulation • Machine code saved on EPROM and loaded onto microprocessor • .asm  .HEX  EPROM burning software Pyxis1600

12. Hardware • XCV300 FPGA • - 322,970 logic gates • - 8 KB on-chip RAM • 128KB off-chip SRAM • 128KB off- chip EPROM Pyxis1600

13. Input / Output Devices • Serial RS232 port • Monitor / LCD • Keyboard / Keypad • USB port Pyxis1600

14. Feature Priority • General-purpose processor • Multi-cycle design • Complete reduced instruction set • Some test code, Game, or Benchmark Program • Assembler • On-chip hardware divider • C compiler • Floating-point unit • L1 data and instruction cache • 5 stage pipeline design Pyxis1600

15. Roles and Responsibilities • Aaron • Logic design • Verilog programming • April • Assembler • Software interfaces • Steve • Hardware components • Hardware interfaces • All • Integration and Test • Documentation Pyxis1600

16. Schedule Pyxis1600

17. Risks and Contingency Plan Pyxis1600

18. Questions