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Contents Projects of FADC link development P-PCI project :

Status report of FADC link Yoshiji Yasu, KEK. Contents Projects of FADC link development P-PCI project : Current status of New board called P-PCI-LV Progress of N x 1 system test with P-PCI interface Current status of backup systems Schedule and TODO.

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Contents Projects of FADC link development P-PCI project :

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  1. Status report of FADC link Yoshiji Yasu, KEK Contents Projects of FADC link development P-PCI project : Current status of New board called P-PCI-LV Progress of N x 1 system test with P-PCI interface Current status of backup systems Schedule and TODO

  2. Projects of FADC link development Development team M. Yamauchi, J. Haba, H.Fujii, M. Tanaka, Y. Igarashi, Y. Yamashita, Y.Ushiroda, C.C. Wang and Y.Yasu P-PCI Project EDT Project for backup S-Link Project for backup

  3. P-PCI project Picture of the interface Connector Pin Assignment P-PCI-LV specification Protocol of message passing Software development Testbed for next plan

  4. PCI interface produced by Fird company（P-PCI-LV）

  5. Connector Pin Assignment Honda Communication Industry(Japan), type PCR-E96FA or equivalent. 96-contact half-pitch connector Data width:32 bit

  6. P-PCI-LV specification Operation mode Bus master(DMA operation) Transfer speed At bus master､??MB/sec Bus width 32 bit parallel input/output Signal level LVDS LVDS chip(driver/receiver) DS90LV031/DS90LV032 External connector PCR-E96FA FIFO size 8kB Clock Internal/external Board size PCI half size

  7. Protocol of message passing

  8. Protocol of message passing Timing chart Simple Protocol

  9. Software development PC/Linux device driver for P-PCI was developed at KEK On kernel 2.4.x and 2.2.x, the driver works now. Read/Write programs was developed for the evaluation. Multi-thread program for gathering event fragments was developed for the evaluation and the real implementation. Preliminary result from the evaluation will be shown.

  10. Progress of N x 1 system test with P-PCI interface Result from 1 x 1 system test with old P-PCI interface N x 1 system test with old/new P-PCI interface

  11. Result from 1 x 1 system test with old P-PCI interface IBM Pentium III 733MHz ServerWorks LE DELL Pentium II 450MHz(xeon) P-PCI ２m cable read command Write command In best effort Speed: 39MB/s at data size of 40kB At maximum fragment size of 8kB, it took 230usec while it took 135usec at the 4kB.

  12. Result from 1 x 1 system test with old P-PCI interface Scalability test In best effort Speed: 39MB/s Speed: 74MB/s (37+37) At 8MB/s rate Speed: 8MB/s Speed: 16MB/s (8+8) This system was scalable.

  13. N x 1 testbed with old/new P-PCI interface 5 x Pentium4 1 x PentiumIII(dual CPU) For minimum requirement (3 inputs from FADCs) For maximum request (5 inputs from FADCs) Test Items: 1. Multi-thread programming test 2. Evaluation of new interface 3. Measurement of maximum throughput 4. Long run test Others...

  14. Current status of backup systems EDT project S-Link project

  15. EDT project Engineering Design Team Inc.(http://www.edt.com) 2 x PCI CD60 interface are at KEK. The hardware and software installation was done. The Linux driver and test programs are supplied by the company. Preliminary test was successfully done. Read/write programs are now under development. PCI CD60 specification Operation mode Bus master(DMA operation) Transfer speed 60MB/sec Bus width 16 bit parallel input/output Signal level LVDS FIFO size 4kB for each input/output Clock Internal(30MHz)

  16. S-Link project S-Link protocol was developed at CERN. Hardware: PCI interface and mezzanine card for transmitter and receiver Software: The driver and test programs were supplied from CERN. Minimum modification of the device driver and test programs was necessary. The test programs were successfully done. S-Link specification Operation mode Bus master(DMA operation) Transfer speed 128MB/sec Bus width 1 bit Signal level Optical(G-Link) FIFO size 1kB

  17. Schedule PCs and P-PCI-LV cards: 6 PCs will come in end of September 2001. New interfaces(10 cards and 5 cables) will be available in October 2001. 70 cards and the cables will be delivered in March 2002. TODO Improvement of the software Reliability test for hardware and software Construction of realistic demonstrator

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