Unit 12 - Part 2 Asynchronous Serial I/O

1. Unit 12 - Part 2 Asynchronous Serial I/O

2. Address Selects Receiver Receivers are put in “standby” mode by setting RWU (Receiver Wake Up) = 1 Address Character N Character Message XMTR RCVR RCVR RCVR RCVR ……..

3. Receiver Wake Up • If RWU == “1” (Receiver is in ‘stand-by’ state) • If WAKE == “1” (Address Mark Wakeup) • A logic 1 in the msb position of a frame clears the RWU bit and wakes up the SCI. (The logic 1 marks the frame as an address frame.) • If Address matches, then Receive Message • If Address doesn’t match, then set RWU=“1” • If WAKE == “0” (Idle line Wakeup) • An idle condition on the input clears the RWU bit and wakes up the SCI. The next frame that is received is assume to contain an Address • If Address matches, then Receive Message • If Address doesn’t match, then set RWU=“1”

4. RWU = “1”, WAKE = “0” Frame N+1 Characters Frame N+1 Characters Frame N+1 Characters Line Idle • Enable Receiver when receiver input is in Idle state (when 10 or 11 1’s are received) • Next received character is considered an Address • If Address matches then receive the rest of Frame • If Address doesn’t match, set RWU = ”1” to ignore rest of Frame

5. RWU = “1” WAKE = “1” • Received “wakes up” if Most Significant Bit of Received Character = “1” • 1 in MSB: Character is an Address • Receive Address • If Match, receive remainder of frame • If No Match, set RWU back to “1” and ignore remainder of frame

6. Single Wire Mode • Loops = “1”, RSRC = “1” • TxDIR = “0” -- TxData is Input to Receiver • TxDIR = “1” -- TxData is Transmitter Output XMTR TxDIR = “1” TxD pin Single Wire Half Duplex RCVR TxDIR = “0”

7. SCI Interrupts • 4 Sources of Interrupts on SCI • TDRE = “1” – Transmitter SCI Buffer Empty • TC = “1” – Transmitter Finished • RDRF = “1” – Receiver SCI Buffer Full • IDLE = “1” – Receive Line is Idle • TDRE and RDRF are commonly used • TC and IDLE used in special applications

8. SCI Interrupt Processing void sci0_isr(void) {// SCI Interrupt has occurred, determine reason if((SCI0SR1&0x20)!=0) { // RDRF=“1” was source of interrupt, buffer is full c=SCI0DRL; // Read character to empty buffer ---- // handle the character } if((SCI0SR1&0x80)!=0) { // TDRE=“1” was source of interrupt, buffer is empty // Case 1 – If have a character c to transmit SCI0DRL = c; // Write character to full buffer } else {// Case 2 – No character to transmit SCI0CR2 = SCI0CR2&0x7F; // set TIE=“0” to disable transmitter interrupts } ---- ---- }