Machine Language

Machine Language ELEC 330 Digital Systems Engineering Dr. Ron Hayne

The 68HC11 Microcomputer • Programming Model • Memory Model • Microprocessor Model • Internal Computer Operations • Instruction Fetch • Instruction Execution • Machine Language Programming 330_02

Programming Model • Motorola 68HC11 Microcomputer 330_02

Memory Model 330_02

Instruction Format • Load Accumulator A • LDAA $C200 330_02

Microprocessor Model • Program Counter • Instruction Register • Accumulators 330_02

Computer Operation • Example Instruction (LDAA) • Register and Memory contents 330_02

Instruction Fetch • PC to Memory as Address • Read 330_02

Instruction Fetch • Memory sends number at address to IR • Increment PC 330_02

Instruction Fetch • Register Contents after Fetch 330_02

Instruction Execution • Data Address to Memory • Read 330_02

Instruction Execution • Memory sends data at address to A 330_02

Instruction Execution • Final Register Contents 330_02

Instruction Set Table • Operand • hh ll • high and low bytes of address 330_02

Machine Language Programming • N1 + N2  SUM 330_02

Summary • Programming Model • Memory Model • Microprocessor Model • Internal Computer Operations • Instruction Fetch • Instruction Execution • Machine Language Programming 330_02

Instructions and Addressing • Addressing Modes • Extended Addressing • Direct Addressing • Inherent Addressing • Immediate Addressing • Indexed Addressing • Relative Addressing 330_02

Addressing • Effective Address • Address formed by microprocessor as part of instruction execution • Addressing Modes • Various ways addresses are formed • Memory Map • Visual technique for understanding implications of addressing modes 330_02

Extended Addressing • Complete 16-bit Address of Data 330_02

Shortened 8-bit Address Most-significant byte 00 Address Range 0000 through 00FF Zero Page Addressing Shorter and Faster Instructions Use less memory Fetched faster Direct Addressing 330_02

Some instructions operate on microprocessor registers only No memory address needed Example ABA A + B  A Inherent (Implied) Addressing 330_02

Some registers hold 16-bit (double-byte) data D, X, Y, SP Example LDX M:(M+1)  X Big-endian convention High byte at first (lower) address Low byte at second (higher) address Double-Byte Data 330_02

Constant data placed inside an instruction No memory address Fewer bytes of memory Data immediately available at end of fetch phase Faster execution Immediate Addressing 330_02

Op Code and Offset Byte Effective Address Offset (unsigned) added to Index Register (pointer) Index Register unchanged Example LDAA 2,X M[2+X]  A Indexed Addressing 330_02

Relative Addressing • Branch Instructions • Make decisions • Alter program flow • Condition Code Register • Reports test results 330_02

C (Carry) Carry-out from the most-significant bit V (Overflow) Two’s complement overflow error Z (Zero) Result contains all zeros N (Negative) Result is negative H (Half-carry) Carry from halfway (bit 3) Generally used only with BCD numbers S, X, I Hardware control bits (later...) Condition Code Bits 330_02

Example • ADDA 330_02

Condition Code Notation • Not all instructions affect all the condition code bits • Always use the instruction set table to determine how the bits work • Don’t assume! 330_02

May alter program flow based on the condition code bits Program Counter Relative Addressing Signed Offset Effective Address PC plus Offset Branch Range? Branch Instructions 330_02

BNE Branch if Not = Zero ? Z = 0 Example LDAA N1 LOOP ADDA #-1 BNE LOOP STOP Branch Not Equal to Zero 330_02

Addressing Mode Summary 330_02

Basic Instructions • Arithmetic and Logic • Load and Store • Input and Output • Testing and Branching 330_02

Programming Model • Motorola 68HC11 Microcomputer 330_02

Instruction Set Table • Source Form • Instruction mnemonic • Type of operand • (opr) data or data address • (rel) relative offset • Operation • Short word description • Booelan Expression • Detailed description of register transfers • Addressing Mode 330_02

Instruction Set Table • Op Code • Machine code for corresponding addressing mode • Operand • ii 8-bit immediate data • dd low byte of direct address • hh ll high and low bytes of extended address • ff unsigned 8-bit offset for indexed addressing • jj kk high and low bytes of 16-bit immediate data • rr signed 8-bit relative offset for branch 330_02

Instruction Set Table • Bytes • Number of bytes of memory (op code + operand) • Cycles • Number of clock cycles to fetch and execute • Condition Codes 330_02

Instruction Set Table 330_02

Instruction Set Table (cont) 330_02

Arithmetic and Logic • ABA • Add B to A • ABX • Add B to X • ADDA, ADDB, ADDD • Add memory to accumulator • ADCA, ADCB • Add memory with carry to accumulator 330_02

Arithmetic and Logic • DEC, DECA, DECB • Decrement memory or accumulator • DEX • Decrement X • INC, INCA, INCB • Increment memory or accumulator • INX • Increment X 330_02

Arithmetic and Logic • NEG, NEGA, NEGB • Negate memory or accumulator • SBA • Subtract B from A • SBCA, SBCB • Subtract with carry • SUBA, SUBB, SUBD • Subtract memory from accumulator 330_02

Machine Language