1 / 14

Scalable Simplification of Reversible Circuits

This article explores scalable techniques to simplify reversible circuits through local optimizations, efficient synthesis methods, and optimal circuit libraries, aiming to generate small, optimal circuits quickly to minimize costs. The approach involves isolating pieces of suboptimal circuits and performing circuit-library lookups for reduction, ensuring a fixed wire count and monotonic gate count improvement. The algorithm involves finding sub-circuits on few wires, computing their function, and replacing them with optimal implementations. Empirical validation shows substantial reduction in gate counts. Future work includes improving circuit library storage, connecting local optimization with synthesis algorithms, and extending methods to quantum logic.

rpenn
Download Presentation

Scalable Simplification of Reversible Circuits

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Scalable Simplification of Reversible Circuits Vivek Shende, Aditya Prasad, Igor Markov, and John Hayes The Univ. of Michigan, EECS

  2. Local Optimization • Optimal synthesis methods • Can synthesize all 3-wire circuits in minutes • Too expensive in the general case • Yet, can be used to quickly generate librariesof small, optimal circuits • Scalable synthesis techniques are suboptimal • Idea behind our work: • Isolate small pieces of suboptimal circuits • Reduce via circuit-library lookups

  3. Our Constraints • Fixed wire count • No transformations that require adding wires • Monotonic improvement of gate counts • Empirical validation with the CNT gate library • No gates with more than 3 inputs • Our gate library is not redundant • Other gate libraries possible

  4. Optimal Circuit Libraries • Built by dynamic programming techniques • Based on our previous work (IWLS / ICCAD ’02) • 20+ times faster & several times more compact • Store millions of small, optimal circuits • All optimal circuits of n gates on k wires • Hashed by permutation computed

  5. Sketch of Algorithm • Find a sub-circuit on few wires • Compute its function by multiplying the gates • Replace with optimal implementation • O(1)-time lookup using hash tables • Repeat until no improvement How does this compare to reduction rules? • Given enough memory, this can’t be worse • Some reductions hard to capture with rules

  6. Finding Subcircuits • Pick a gate and collect its neighbors • Stop when total # inputs > k(empirical validation with k=4) • Can find additional subcircuits • Some gates can be reordered • This exposes more reductions(example coming soon)

  7. Commutability Rules • When can gates be reordered? • Enumeration of gate reorderings is nontrivial • Do not (need to) try all reorderings • Some useful reorderings are easy to find

  8. Commutability Rules • Reordering gates • Can make reductions more “obvious” • And easier to locate algorithmically

  9. Does This Actually Work? • Our algorithms run on large circuits in ~linear time • In randomly generated circuitsremoves up to 30% of gates • Many non-trivial reductions found and applied However, • No reversible circuit benchmarks are available • Published reversible circuits are hand-crafted • Most likely locally optimal

  10. Future Work • Improve circuit library storage • By taking advantage of symmetry • Connect local optimization with synthesis algorithm from T|C|T|N-decomposition • A complete tool for reversible logic synthesis • Applicable to even 20-input circuits

  11. Future Work • Determine fruitful local optimizations • Are some optimizations better than others? • Add hill-climbing (local de-optimizations) • Is this useful? • Extend methods to quantum logic

  12. Are there any questions? Thank You For Your Attention

  13. Commutability Rules • Gates do not usually commute • But sometimes they “almost” do • Yield circuit equivalences • And therefore reduction rules

  14. Previous Work • Optimal Synthesis Methods • Use dynamic programming techniques • Work for 3-wire synthesis, but not much further • Commutability Rules • Determine when gates can be reordered V. Shende et. Al., “Synthesis of Reversible Logic Circuits,” to appear in TCAD, 2003.

More Related