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CHAPTER 6 Field Effect Transistors (FETs)

CHAPTER 6 Field Effect Transistors (FETs). Acknowledged to: Shahrul Ashikin Azmi (PPKSE). Objectives. Explain the operation and characteristics of junction field effect transistors (JFET). Understand JFET parameters. Discuss and analyze how JFETs are biased.

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CHAPTER 6 Field Effect Transistors (FETs)

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  1. CHAPTER 6Field Effect Transistors (FETs) Acknowledged to: Shahrul Ashikin Azmi (PPKSE)

  2. Objectives • Explain the operation and characteristics of junction field effect transistors (JFET). • Understand JFET parameters • Discuss and analyze how JFETs are biased • Explain the operation and characteristics of metal oxide semiconductor field effect transistors (MOSFET) • Discuss and analyze how MOSFET are biased • Troubleshoot FET circuits.

  3. Introduction • FET – a three-terminal voltage-controlled device used in amplification and switching application. • Field effect transistors controls current by voltage applied to the gate. The FET’s major advantage over the BJT is high input resistance. • 2 basic type of FET: JFET and MOSFET

  4. JFET The junction field effect transistor, like a BJT, controls current flow. The difference is the way this is accomplished. The JFET uses voltage to control the current flow. As you will recall the transistor uses current flow through the base-emitter junction to control current. JFETs can be used as an amplifier just like the BJT. VGGvoltage levels control current flow in theVDD, RD circuit.

  5. JFET • The terminals of a JFET are the source, gate, and drain. • A JFET can be either p channel or n channel.

  6. JFET • VDD provide a drain-to-source voltage. • VGG sets the reverse-bias voltage between gate and source. JFET is always operated with gate-source pn junction reverse-biased. Reverse-biasing of the gate-source junction with a –ve gate voltage produces a depletion region along pn junction.

  7. JFET Biasing • Gate-to-source junction of JFET always reverse-biased under normal condition. • Gate-to-source junction never allowed to become forward-biased because the gate material is not designed to handle any significant amount of current  may destroy the component. • The fact gate is always reverse-biased leads to important feature  JFET has high gate input impedance; typically in high megaohm range. • This feature result to JFET extensively being used in integrated circuits. Low current draw helps IC remain cool, thus allowing more components to be placed in a smaller physical area.

  8. JFET Characteristics and Parameters Let’s first take a look at the effects with a VGS of 0V. This is produced by shorting the gate to source junction.

  9. JFET Drain Curve

  10. Refer to JFET drain curve from point A to B, ID increases proportionally with increases of VDD (VDS increases as VDD increases). This is called the ohmic region (point A to B) because VDS and ID are related by Ohm’s Law. At point B, the curve levels off and ID becomes constant. The point when ID ceases to increase regardless of VDD increases is called the pinch-off voltage, VP (point B). This current is called maximum drain current (IDSS) and always specified for the condition, VGS=0V. This area is called constant-current area. Breakdown (point C) occur when ID begins to increase rapidly with any increase in VDS. This of course undesirable, so JFETs operation is always well below this value.

  11. JFET Characteristics and Parameters

  12. JFET Characteristics and Parameters From this set of curves you can see with increased voltage applied to the gate, ID decrease and JFET reaches pinch-off at values of VDS less than VP.

  13. JFET Characteristics and Parameters

  14. JFET Characteristics and Parameters • We know that as VGSis increased IDwill decrease. The point that ID ceases increase is called cutoff. The amount of VGSrequired to do this is called the cutoff voltage (VGS(off )). • The more negative VGS, the smaller ID becomes. When VGS has sufficiently large negative value, ID is reduced to zero. It is interesting to note that pinch-off voltage (Vp) and cutoff voltage (VGS(off)) are both the same value only opposite polarity.

  15. JFET Transfer Characteristic • For n-channel JFET, VGS(off) is negative and for p-channel, VGS(off) is positive. • Bottom end of the curve is at a point on VGS axis equal to VGS(off) and the top end of the curve is at a point on ID axis equal to IDSS (shorted-gate drain current rating of the device). • The operating limits of JFET are: • ID=0 when VGS=VGS(off) • ID=IDSS when VGS = 0 • Transfer characteristic curve can be developed from drain characteristic curves by plotting values of ID for the values of VGS taken from the family of drain curves at pinch-off.

  16. JFET Characteristics and Parameters The transfer characteristic curve illustrates the control VGShas on IDfrom cutoff (VGS(off) ) to pinchoff (VP). Note the parabolic shape. The formula below can be used to determine drain current. All these values are usually available from data sheet. ID = IDSS(1 - VGS/VGS(off))2

  17. JFET Characteristics and Parameters Forward transfer conductance, gm of JFETs is sometimes considered. It is the changes in ID based on changes in VGS with VDS is constant. Input resistance for a JFET is high since the gate -source junction is reverse biased, however the capacitive effects can offset this advantage particularly at high frequencies. The value is larger at the top of the curve (near VGS=0) but become smaller as you increase VGS (near VGS(off)).

  18. Transconductance

  19. Transconductance Forward transfer conductance referred to as gm = ∆ID /∆VGS. At VGS =0, the parameter is known as minimum transfer conductance, gmo and can be calculated using this equation: gmo = 2IDSS/|VGS(off)| and gm = gmo(1 - VGS/VGS(off)) gmo can be read from the datasheet as gfs or yfs and sometimes written as Forward Transfer Admittance.

  20. JFET Input Resistance Since JFET is reverse-biased for operation, its input resistance becomes so large. This is an advantage of using JFET. Looking at the datasheet, you may calculate the resistance value by using the Gate Reverse Current IGSS. This internal input resistance can be calculated at different VGS : RIN=|VGS/IGSS| As IGSS increases with temperature, RIN will decrease.

  21. JFET Input Resistance Example 1: Calculate RIN if IGSS=-2nA and VGS=-20V Solution: RIN=|VGS/IGSS|=|-20/-2n|=10G

  22. JFET Biasing Circuit • Just as we learned that the bi-polar junction transistor must be biased for proper operation, the JFET also must be biased for operation. Let’s look at some of the methods for biasing JFETs. In most cases the ideal Q-point will be the middle of the transfer characteristic curve which is about half of the IDSS. • 4 types of bias method are self-bias, gate-bias, voltage-divider bias and current-source bias.

  23. JFET Biasing- Self bias • Self-bias is the most common type of biasing method for JFETs. Notice there is no voltage applied to the gate, VG=0V. However, the voltage from gate to source (VGS) will be negative for n channel and positive for p channel to keep the junction reverse biased. • Uses a source resistor to help reverse biase JFET gate. The gate is returned to ground via RG, and RS has been added to source circuit. • This voltage can be determined using the formulas below. ID= ISfor all JFET circuits. VG=0 and VS=IDRS. • VGS = VG - VS • (n channel) VGS = 0-IDRS =-IDRS • (p channel) VGS = 0-(-IDRS )=IDRS

  24. JFET Biasing- Self bias

  25. JFET Biasing – self bias • Keep in mind that analysis of p-channel is the same as n-channel except for opposite polarity voltages. • The drain voltage with respect to ground is: VD = VDD – IDRD • Since VS = IDRS, VDS is: VDS = VD – VS = VDD – ID(RD+RS)

  26. JFET Biasing-self bias • Setting the Q-point requires us to determine a value of RS that will give us the desired ID and VGS. The formula below shows the relationship. • RS = | VGS/ID | • For a desired value of VGS,ID can be determinedfrom the either the transfer characteristic curve or more practically from the formula below. The data sheet provides the IDSSand VGS(off). • ID = IDSS(1 - VGS/VGS(off))2

  27. JFET Biasing-self bias Midpoint biasing- desirable to bias a JFET near the midpoint of its transfer characteristic curve where ID =IDSS / 2. IDis approximately one-half of IDSSwhen: VGS VGS(off)/3.4

  28. JFET Biasing-self-bias The value of RSneeded to establish VGS can be determined by the relationship below. RS = |VGS/ID | To set the drain voltage at midpoint (VD=VDD/2), select a value of RD to produce the desired voltage drop. The value of RDneeded can be determined by taking half of VDD and dividing it by ID. RD = (VDD/2)/ID

  29. JFET Biasing- self-bias Remember the purpose of biasing is to set a dc operating point (Q-point). In a self-biasing type JFET circuit, the Q-point is determined by the given parameters of the JFET itself and values of RSand RD. Setting it at midpoint on the drain curve is most common. One thing not mentioned in the discussion is RG. It’s value is arbitrary large to prevent loading on the driving stage in a cascaded amplifier arrangement.

  30. JFET Biasing-graphical The transfer characteristic curve along with other parameters can be used to determine the mid-point bias Q-point of a self-biased JFET circuit. First, establish dc load line by calculating VGS. VGS = -IDRS for ID=0 and ID=IDSS With 2 points (ID=0 and ID=IDSS), draw dc load line on the transfer characteristic curve. The point where the two lines intersect gives us the ID and VGS(Q-point) needed for mid-point bias. Note that load line extends from VGS(off)(ID= 0A) to VP(ID = IDSS)

  31. JFET Biasing

  32. JFET Biasing- gate-bias

  33. JFET Biasing – gate-bias • Gate supply voltage (-VGG) is used to ensure gate-to-source junction is reverse-biased. Since there is no gate current, there is no voltage dropped across RG. So, VGS = -VGG. • RG  to prevent input signal from being shorted to gate supply through low reactance of input coupling capacitor. • To find ID, use ID = IDSS(1 - VGS/VGS(off))2 • VDS= VDD – IDRD • Diadvantage: Gate bias does not provide a stable Q-point value of ID from one JFET to another.

  34. JFET Biasing- voltage divider bias • Voltage-divider bias can also be used to bias a JFET. R1and R2are used to keep the gate-source junction in reverse bias. Operation is no different from self-bias. Determining VGS for a JFET voltage-divider circuit with givenVD can be calculated with the formulas below. Source voltage,VS = IDRS Gate voltage, VG =(R2/R1+R2)VDD Gate-to-source voltage.VGS=VG –VS Source voltage, VS = VG - VGS

  35. JFET Biasing- voltage-divider bias • VS must be more +ve than VG in order to keep VGS reverse-biased (-ve value). Drain current, ID = (VDD – VD)/RD or Since ID=IS, then ID=VS/RS

  36. JFET Biasing-graphical • In using the transfer characteristic curve to determine the approximate Q-point we must establish the two points for the load line. • The first point is ID = 0 and VGS =VG. • VS=IDRS=(0)RS=0V • VGS=VG-VS=VG-0=VG • For VGS=0, • ID=(VG-VGS) / RS = VG / RS • The second point is ID=VG / RS and VGS=0.

  37. The point at which the load line intersect with transfer characteristic curve is Q-point. Dc load line for JFET with voltage-divider bias

  38. JFET Biasing – Current Source Bias • Current source bias  provides high Q-point stability by making value of ID independently of JFET. • From figure, JFET drain current equals BJT collector current. IDQ = IC • The value of IC is less than the lowest value of IDSS for JFET. Assume JFET in the figure has a value of IDSS=5-12mA, so as long as IC < 5mA, value of IDQ is independently of JFET itself. • Advantage: provide the most stable Q-point value of ID. • Disadvantage: circuit complexity makes it undesirable for most applications.

  39. JFET Biasing- Current source bias

  40. JFET Biasing Transfer characteristics can vary for JFETs of the same type. This would adversely affect the Q-point for self-bias analysis. Q-point is much more stable using voltage-divider bias and current source bias.

  41. MOSFET The metal oxide semiconductor field effect transistor (MOSFET) is the second category of FETs. The difference is that there no pn junction structure instead gate of MOSFET is insulated from the channel by silicon dioxide layer. MOSFETs are static sensitive devices and must be handled by appropriate means. There are depletion MOSFETs (D-MOSFET) and enhancement MOSFETs (E-MOSFET). Note the difference in construction. The E-MOSFET has no structural channel.

  42. D-MOSFET The D-MOSFET can be operated in depletion or enhancement modes. To be operated in depletion mode, a negative gate-to-source voltage is applied. With negative gate voltage, negative charges on the gate repel electrons from channel, leaving +ve ions in their place. N-channel is depleted of some electron, thus decreasing channel conductivity.

  43. D-MOSFET To be operated in the enhancement mode the gate-to-source is made more positive, attracting more electrons into the channel for better current flow and thus enhancing the channel conductivity. Remember we are using n channel MOSFETs for discussion purposes. For p channel MOSFETs, polarities would change.

  44. E-MOSFET The E-MOSFET or enhancement MOSFET can operate in only the enhancement mode. With a positive voltage above a threshold value on the gate, an induced channel of thin layer of –ve charges is created. The conductivity of channel is enhanced by increase VGS and thus pulling more electrons into channel area.

  45. POWER MOSFET The lateral double diffused MOSFET (LDMOSFET) and the V-groove MOSFET (VMOSFET) are specifically designed for high power applications. LDMOSFET VMOSFET

  46. POWER MOSFET • Dual gate MOSFETs have two gates which helps control unwanted capacitive effects at high frequencies.

  47. MOSFET Characteristics and Parameters Since most of the characteristics and parameters of MOSFETs are the same as JFETs we will cover only the key differences.

  48. D-MOSFET Characteristics and Parameters The D-MOSFET operate in either +ve or –ve gate voltages. The point on the curves where VGS=0 corresponds to IDSS. The point where ID=0 corresponds to VGS(off). As with JFET, VGS(off)=-VP. The equation to find drain current also the same as JFET: ID = IDSS(1 - VGS/VGS(off) )2 Remember n and p channel polarity differences.

  49. Example 7-13 • For a certain D-MOSFET, IDSS=10mA and VGS(off)=-8V. • Is this n-channel or a p-channel? • Calculate ID at VGS=-3V. • Calculate ID at VGS=+3V. Solution: • The device has a –ve VGS(off), this is an n-channel MOSFET. • ID=IDSS(1-VGS/VGS(off))2=(10mA)(1- (-3/-8))2 =3.91mA • ID=(10mA)(1- (+3/-8))2=18.9mA

  50. E-MOSFET Characteristics and Parameters The E-MOSFET for all practical purposes does not conduct until VGS reaches the threshold voltage (VGS(th)).ID when conducting can be determined by the formulas below. The constant K must first be determined from data sheet by taking ID(on) at any given value of VGS on a particular MOSFET. K = ID(on) /(VGS - VGS(th))2 ID = K(VGS - VGS(th))2

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